DSPIC33FJ64MC508A-I/PT Microchip Technology, DSPIC33FJ64MC508A-I/PT Datasheet - Page 6

• Manufacturer Part Number: DSPIC33FJ64MC508A-I/PT
• Description: 16 Bit MCU/DSP 40MIPS 64KB FLASH 80 TQFP 12x12x1mm TRAY
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC508A-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12. Module: CPU
13. Module: SPI
DS80464D-page 6
The EXCH instruction does not execute correctly.
Work around
If
recommended work around is to replace:
EXCH Wsource, Wdestination
with:
PUSH Wdestination
MOV Wsource, Wdestination
POP Wsource
If using the MPLAB C30 C compiler, specify the
compiler option: -merrata=exch (Project > Build
Options > Projects > MPLAB C30 > Use Alternate
Settings).
Affected Silicon Revisions
Writing to the SPIxBUF register as soon as the
TBF bit is cleared will cause the SPI module to
ignore the written data. Applications which use SPI
with DMA will not be affected by this erratum.
Work around
After the TBF bit is cleared, wait for a minimum
duration of one SPI Clock before writing to the
SPIxBUF register.
Alternatively, do one of the following:
1. Poll the RBF bit and wait for it to get set before
2. Poll the SPI Interrupt flag and wait for it to get
3. Use an SPI Interrupt Service Routine.
4. Use DMA.
Affected Silicon Revisions
A3
A3
X
X
writing to the SPIxBUF register.
set before writing to the SPIxBUF register.
writing
A4
A4
X
X
source
code
in
assembly,
the
14. Module: ECAN
15. Module: UART
16. Module: QEI
ECAN module may not transmit Buffer 0 data if
Buffer 1 data is queued first for the transmission.
This problem is specific to transmit Buffers 0 and 1
only.
Work around
The issue can be fixed by setting reserved bit 11 in
CiCTRL1 register to 1. Note that the module reset
value for this bit is zero.
Affected Silicon Revisions
The UART module will not generate consecutive
break characters. Trying to perform a back-to-back
Break character transmission will cause the UART
module to transmit the dummy character used to
generate the first Break character instead of
transmitting the second Break character. Break
characters are generated correctly if they are
followed by non-Break character transmission.
Work around
None.
Affected Silicon Revisions
When the TQCS and TQGATE bits in the
QEIxCON register are set, a QEI interrupt should
be generated after an input pulse on the QEA
input. This interrupt is not generated in the affected
silicon.
Work around
None.
Affected Silicon Revisions
A3
A3
A3
X
X
X
A4
A4
A4
X
X
X
© 2010 Microchip Technology Inc.