DSPIC33FJ64MC804-H/PT Microchip Technology, DSPIC33FJ64MC804-H/PT Datasheet - Page 162
![16-bit DSC, 64KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 TQFP 10x10x1mm TRA](/photos/6/82/68251/c04-076_pt_sml.jpg)
DSPIC33FJ64MC804-H/PT
Manufacturer Part Number
DSPIC33FJ64MC804-H/PT
Description
16-bit DSC, 64KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 TQFP 10x10x1mm TRA
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ32MC302-ISO.pdf
(436 pages)
Specifications of DSPIC33FJ64MC804-H/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b, D/A 6x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC804-H/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
- Current page: 162 of 436
- Download datasheet (6Mb)
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 10-3:
DS70291E-page 162
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3-0
CRCMD
R/W-0
U-0
—
Unimplemented: Read as ‘0’
CMPMD: Comparator Module Disable bit
1 = Comparator module is disabled
0 = Comparator module is enabled
RTCCMD: RTCC Module Disable bit
1 = RTCC module is disabled
0 = RTCC module is enabled
PMPMD: PMP Module Disable bit
1 = PMP module is disabled
0 = PMP module is enabled
CRCMD: CRC Module Disable bit
1 = CRC module is disabled
0 = CRC module is enabled
DAC1MD: DAC1 Module Disable bit
1 = DAC1 module is disabled
0 = DAC1 module is enabled
QEI2MD: QEI2 Module Disable bit
1 = QEI2 module is disabled
0 = QEI2 module is enabled
PWM2MD: PWM2 Module Disable bit
1 = PWM2 module is disabled
0 = PWM2 module is enabled
Unimplemented: Read as ‘0’
DAC1MD
R/W-0
U-0
—
PMD3: PERIPHERAL MODULE DISABLE CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
QEI2MD
R/W-0
U-0
—
PWM2MD
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
CMPMD
R/W-0
U-0
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
RTCCMD
R/W-0
U-0
—
PMPMD
R/W-0
U-0
—
bit 8
bit 0
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