EP20K300EQC240-2XN Altera, EP20K300EQC240-2XN Datasheet - Page 112
EP20K300EQC240-2XN
Manufacturer Part Number
EP20K300EQC240-2XN
Description
APEX 20KE
Manufacturer
Altera
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APEX 20K Programmable Logic Device Family Data Sheet
112
t
t
t
t
t
t
t
t
t
t
LVCMOS
LVTTL
2.5 V
1.8 V
PCI
GTL+
SSTL-3 Class I
SSTL-3 Class II
SSTL-2 Class I
SSTL-2 Class II
LVDS
CTT
AGP
I N S U B I D I R
I N H B I D I R
O U T C O B I D I R
X Z B I D I R
Z X B I D I R
I N S U B I D I R P L L
I N H B I D I R P L L
O U T C O B I D I R P L L
X Z B I D I R P L L
Z X B I D I R P L L
Table 108. EP20K1500E External Bidirectional Timing Parameters
Table 109. Selectable I/O Standard Input Delays
Symbol
Symbol
3.47
0.00
2.00
3.05
0.00
0.50
Min
-1 Speed Grade
Min
-1 Speed Grade
Tables 109
delays for APEX 20KE devices. If you select an I/O standard input or
output delay other than LVCMOS, add or subtract the selected speed
grade to or from the LVCMOS value.
–0.11
–0.24
–0.32
–0.08
–0.17
–0.16
–0.12
0.00
0.00
0.00
0.01
0.00
Max
Max
6.18
6.91
6.91
2.67
3.41
3.41
0.00
and
110
Min
-2 Speed Grade
3.68
0.00
2.00
3.26
0.00
0.50
Min
-2 Speed Grade
show selectable I/O standard input and output
–0.23
–0.21
–0.06
–0.05
–0.12
Max
0.00
0.00
0.04
0.03
0.09
0.03
0.00
0.00
Max
6.81
7.62
7.62
2.99
3.80
3.80
Min
-3 Speed Grade
3.99
0.00
2.00
Min
-3 Speed Grade
–0.19
–0.47
–0.23
–0.32
–0.31
–0.12
Max
0.00
0.00
0.05
0.04
0.10
0.00
0.00
Altera Corporation
Max
7.36
8.38
8.38
Unit
Min
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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