EP20K400CF672C7 Altera, EP20K400CF672C7 Datasheet - Page 40

• Manufacturer Part Number: EP20K400CF672C7
• Description: APEX 20KC
• Manufacturer: Altera

APEX 20KC Programmable Logic Device Data Sheet
Figure 25. APEX 20KC Bidirectional I/O Registers
40
Row, Column, FastRow,
or Local Interconnect
4 Dedicated
Inputs
Clock Inputs
4 Dedicated
4
Peripheral Control
Bus
12
VCC
OE[7..0]
CLK[1..0]
CLK[3..0]
ENA[5..0]
CLRn[1..0]
VCC
Input Pin to Input
Core to Output
Register Delay
Register Delay
VCC
VCC
VCC
VCC
VCC
Chip-Wide
Chip-Wide
Chip-Wide Reset
Core Delay (1)
Core Delay (1)
Clock Enable
Input Pin to
Input Pin to
Reset
Reset
Delay (1 )
Notes
Output Enable
Output Register
Chip-Wide
Input Register
OE Register
(1),
ENA
D
D
ENA
D
ENA
CLRN
CLRN
CLRN/
PRN
(2)
Q
Q
Q
Open-Drain
Slew-Rate
Output
Control
Core Delay (1)
Output Register
Input Pin to
t
CO
Delay
Altera Corporation
VCCIO
Optional
PCI Clamp