EPC1441TI32 Altera, EPC1441TI32 Datasheet - Page 29

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EPC1441TI32

Manufacturer Part Number
EPC1441TI32
Description
Configuration Devices
Manufacturer
Altera
Datasheet

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Altera Corporation
Operating
Conditions
Figure 10. EPC2 JTAG Waveforms
Table 11
devices.
Tables 12
recommended operating conditions, DC operating conditions, and
capacitance for configuration devices.
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 11. JTAG Timing Parameters & Values
Captured
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high-impedance to valid output
Update register valid output to high impedance
shows the timing parameters and values for configuration
through
Configuration Devices for SRAM-Based LUT Devices Data Sheet
t
JCH
t
t
JSZX
JPZX
19
t
JCP
provide information on absolute maximum ratings,
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JPH
JSXZ
Min
100
50
50
20
45
20
45
t
Max
JPXZ
25
25
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
29

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