EPF6016AQC208-1N Altera, EPF6016AQC208-1N Datasheet - Page 8

FLEX 6000

EPF6016AQC208-1N

Manufacturer Part Number
EPF6016AQC208-1N
Description
FLEX 6000
Manufacturer
Altera
Datasheet

Specifications of EPF6016AQC208-1N

Family Name
FLEX 6000
Number Of Usable Gates
16000
Number Of Logic Blocks/elements
1320
# I/os (max)
171
Frequency (max)
200MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
3.3V
Logic Cells
1320
Device System Gates
16000
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / Rohs Status
Compliant

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FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 3. LAB Control Signals
8
Input signals to the first
LE in an LAB (i.e., LE 1)
can be rerouted to drive
control signals within
the LAB.
Dedicated Inputs
The dedicated input signals
can drive the clock and
asynchronous clear signals.
Logic Element
An LE, the smallest unit of logic in the FLEX 6000 architecture, has a
compact size that provides efficient logic usage. Each LE contains a four-
input LUT, which is a function generator that can quickly implement any
function of four variables. An LE contains a programmable flipflop, carry
and cascade chains. Additionally, each LE drives both the local and the
FastTrack Interconnect. See
Figure
4
LE 1
4.
LAB-wide control signals
(SYNCLR and SYNLOAD
signals are used in counter mode).
LABCTRL1/
SYNCLR
CLK1/SYNLOAD
LABCTRL2
Altera Corporation
CLK2

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