EPM7192EGC160-12 Altera, EPM7192EGC160-12 Datasheet - Page 26

• Manufacturer Part Number: EPM7192EGC160-12
• Description: MAX 7000/S/AE/B
• Manufacturer: Altera

MAX 7000 Programmable Logic Device Family Data Sheet
Figure 12. MAX 7000 Timing Model
Notes:
(1)
(2)
26
Only available in MAX 7000E and MAX 7000S devices.
Not available in 44-pin devices.
Delay
Input
t
I N
f
Delay
PIA
t
PIA
The timing characteristics of any signal path can be derived from the
timing model and parameters of a particular device. External timing
parameters, which represent pin-to-pin timing delays, can be calculated
as the sum of internal parameters.
relationship of internal and external delay parameters.
For more infomration, see
Timing).
Expander Delay
Internal Output
Global Control
Control Delay
Enable Delay
Logic Array
Register
Shared
Delay
Delay
t
t
t
t
t
t
t
GLOB
SEXP
LAD
LAC
I C
EN
IOE
(1)
Expander Delay
Parallel
Application Note 94 (Understanding MAX 7000
t
PEXP
Input Delay
Fast
Figure 13
t
F I N
(1)
Register
t
t
t
t
t
t
t
t
Delay
SU
H
PRE
CLR
RD
COMB
FSU
FH
shows the internal timing
Output
Delay
t
t
t
t
t
t
t
OD1
OD2
OD3
XZ
Z
Z X2
Z X3
X1
Altera Corporation
(2)
(2)
(1)
Delay
I/O
t
I O