KSZ8997 Micrel Inc, KSZ8997 Datasheet - Page 15

• Manufacturer Part Number: KSZ8997
• Description: 8 Port 10/100 Switch With PHY And Frame Buffers (Lead Free)
• Manufacturer: Micrel Inc

Specifications of KSZ8997

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Fiber Support: No
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Package Type: PQFP
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 128
• Mounting: Surface Mount
• Jtag Support: No
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1043

KS8997
Micrel
Functional Overview: Physical Layer Transceiver
100BaseTX Transmit
The 100BaseTX transmit function performs parallel-to-serial conversion, 4B/5B coding, scrambling, NRZ to NRZI conversion,
MLT3 encoding and transmission. The circuit starts with a parallel to serial conversion, which converts the MII data from the
MAC into a 125MHz serial bit stream. The data and control stream is then converted into 4B/5B coding followed by a scrambler.
The serialized data is further converted from NRZ to NRZI format, and then transmitted in MLT3 current output. The output
current is set by an external 1% 3.01k resistor for the 1:1 transformer ratio. It has a typical rise/fall time of 4ns and complies
with the ANSI TP-PMD standard regarding amplitude balance, overshoot and timing jitter. The wave-shaped 10BaseT output
is also incorporated into the 100BaseTX transmitter.
100BaseTX Receive
The 100BaseTX receiver function performs adaptive equalization, DC restoration, MLT3 to NRZI conversion, data and clock
recovery, NRZI to NRZ conversion, de-scrambling, 4B/5B decoding and serial to parallel conversion. The receiving side starts
with the equalization filter to compensate for inter-symbol interference (ISI) over the twisted pair cable. Since the amplitude
loss and phase distortion is a function of the length of the cable, the equalizer has to adjust its characteristics to optimize the
performance. In this design, the variable equalizer will make an initial estimation based on comparisons of incoming signal
strength against some known cable characteristics, then it tunes itself for optimization. This is an ongoing process and can
self adjust against environmental changes such as temperature variations.
The equalized signal then goes through a DC restoration and data conversion block. The DC restoration circuit is used to
compensate for the effect of base line wander and improve the dynamic range. The differential data conversion circuit converts
the MLT3 format back to NRZI. The slicing threshold is also adaptive.
The clock recovery circuit extracts the 125MHz clock from the edges of the NRZI signal. This recovered clock is then used to
convert the NRZI signal into the NRZ format. The signal is then sent through the de-scrambler followed by the 4B/5B decoder.
Finally, the NRZ serial data is converted to the MII format and provided as the input data to the MAC.
PLL Clock Synthesizer
The KS8997 generates 125MHz, 62MHz, 25MHz and 10MHz clocks for system timing. Internal clocks are generated from an
external 25MHz crystal.
Scrambler/De-Scrambler (100BaseTX only)
The purpose of the scrambler is to spread the power spectrum of the signal in order to reduce EMI and baseline wander. The
data is scrambled through the use of an 11-bit wide linear feedback shift register (LFSR). This can generate a 2047-bit non-
repetitive sequence. The receiver will then de-scramble the incoming data stream with the same sequence at the transmitter.
10BaseT Transmit
The output 10BaseT driver is incorporated into the 100BaseT driver to allow transmission with the same magnetics. They are
internally wave-shaped and pre-emphasized into outputs with a typical 2.3V amplitude.
10BaseT Receive
On the receive side, input buffer and level detecting squelch circuits are employed. A differential input receiver circuit and a
PLL perform the decoding function. The Manchester-encoded data stream is separated into clock signal and NRZ data. A
squelch circuit rejects signals with levels less than 400mV or with short pulse widths in order to prevent noises at the RXP or
RXM input from falsely triggering the decoder. When the input exceeds the squelch limit, the PLL locks onto the incoming signal
and the KS8997 decodes a data frame. The receiver clock is maintained active during idle periods in between data reception.
Power Management
Power Save Mode
The KS8997 will turn off everything except for the Energy Detect and PLL circuits when the cable is not installed on an individual
port basis. In other words, the KS8997 will shutdown most of the internal circuits to save power if there is no link.
MDI/MDI-X Auto Crossover
The KS8997 supports MDI/MDI-X auto crossover. This facilitates the use of either a straight connection CAT-5 cable or a
crossover CAT-5 cable. The auto-sense function will detect remote transmit and receive pairs, and correctly assign the transmit
and receive pairs from the Micrel device. This can be highly useful when end users are unaware of cable types and can also
save on an additional uplink configuration connection.
The auto MDI/MDI-X is achieved by the Micrel device listening for the far end transmission channel and assigning transmit/
receive pairs accordingly.
August 2003
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KS8997