LM3559TLE/NOPB National Semiconductor, LM3559TLE/NOPB Datasheet - Page 6

• Manufacturer Part Number: LM3559TLE/NOPB
• Description: LM3559
• Manufacturer: National Semiconductor
• Series: -r

Specifications of LM3559TLE/NOPB

• Constant Current: Yes
• Constant Voltage: -
• Topology: High Side, PWM, Step-Up (Boost)
• Number Of Outputs: 2
• Internal Driver: Yes
• Type - Primary: Flash/Torch
• Type - Secondary: White LED
• Frequency: 1.8MHz ~ 2.2MHz
• Voltage - Supply: 2.5 V ~ 5.5 V
• Voltage - Output: -
• Mounting Type: Surface Mount
• Package / Case: 16-UFBGA
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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HWEN, STROBE, TX1/TORCH/GPIO1, TX2/INT/GPIO2 Voltage Specifications
V
V
R
I
V
V
V
I
1/t
t
t
t
t
2
2
2
3
4
5
IL
IH
C-Compatible Voltage Specifications (SCL, SDA)
IL
IH
OL
C-Compatible Timing Specifications (SCL, SDA)
PD
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see
the Electrical Characteristics table.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
T
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level chip Scale
Package (AN-1112)
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
dissipation of the device in the application (P
following equation: T
Note 6: Junction-to-ambient thermal resistance (θ
JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2x1 array of thermal vias. The ground plane
on the board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5 oz/1oz/1oz/1.5 oz). Ambient temperature in simulation is 22°C,
still air. Power dissipation is 1W.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical (Typ) numbers are not guaranteed, but do represent the most likely
norm. Unless otherwise specified, conditions for typical specifications are: V
Note 8: The typical curve for Current Limit is measured in closed loop using the typical application circuit, and increasing I
increasing. The value given in the Electrical Table is measured open loop and is found by forcing current into SW until the current limit comparator threshold is
reached. Closed loop data appears higher due to the delay between the comparator trip point and the NFET turning off. This delay allows the closed loop inductor
current to ramp higher after the trip point by approximately 20 ns × V
Note 9: The typical curve for Over-Voltage Protection (OVP) is measured in closed loop using the typical application circuit . The OVP value is found by forcing
an open circuit in the LED1 and LED2 path and recording the peak value of V
by ramping the voltage at OUT until the OVP comparator trips. The closed loop data can appear higher due to the stored energy in the inductor being dumped
into the output capacitor after the OVP comparator trips. At worst case is an open circuit condition where the output voltage can continue to rise after the OVP
comparator trips by approximately I
Note 10: Guaranteed by design, not production tested.
1
J
=+135°C (typ.). Thermal shutdown is guaranteed by design.
Symbol
A-MAX
Input Logic Low
Input Logic High
Internal Pulldown
Resistance on
TX1, TX2,
STROBE
Input Logic Low
Input Logic High
Output Logic Low
(SDA)
SCL(Clock
Frequency)
Data In Setup
Time to SCL High
Data Out Stable
After SCL Low
SDA Low Setup
Time to SCL Low
(Start)
SDA High Hold
Time After SCL
High (Stop)
= T
Parameter
J-MAX-OP
IN
×sqrt(L/C
– (θ
JA
A-MAX
× P
D-MAX
OUT
D-MAX
2.7V
2.7V
2.7V
2.7V
I
2.7V
) is dependent on the maximum operating junction temperature (T
LOAD
)
), and the junction-to-ambient thermal resistance of the part/package in the application (θ
JA
) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the
).
≤
≤
≤
≤
≤
= 3mA,
V
V
V
V
V
IN
IN
IN
IN
IN
≤
≤
≤
≤
≤
(Note
5.5V
5.5V
5.5V
5.5V
5.5V
Conditions
IN
/L
10)
IN
OUT
= 3.6V and T
6
. The value given in the Electrical Table is found in an open loop configuration
A
= +25ºC.
Min
100
100
100
1.2
1.3
0
0
0
J-MAX-OP
OUT
Typ
300
400
J
=+150°C (typ.) and disengages at
= +125ºC), the maximum power
until the peak inductor current stops
Max
0.4
V
0.4
V
0.4
IN
IN
JA
), as given by the
Units
kHz
kΩ
ns
ns
ns
ns
V
V
V
V
V