AD7008JP50-REEL Analog Devices Inc, AD7008JP50-REEL Datasheet

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AD7008JP50-REEL

Manufacturer Part Number
AD7008JP50-REEL
Description
IC DDS MODULATOR CMOS 44-PLCC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7008JP50-REEL

Rohs Status
RoHS non-compliant
Noise Floor
*
Voltage - Supply
5V
Package / Case
44-LCC
Lead Free Status / RoHS Status
Not Compliant
a
PRODUCT DESCRIPTION
The AD7008 direct digital synthesis chip is a numerically con-
trolled oscillator employing a 32-bit phase accumulator, sine and
cosine look-up tables and a 10-bit D/A converter integrated on a
single CMOS chip. Modulation capabilities are provided for
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Single +5 V Supply
32-Bit Phase Accumulator
On-Chip COSINE and SINE Look-Up Tables
On-Chip 10-Bit DAC
Frequency, Phase and Amplitude Modulation
Parallel and Serial Loading
Software and Hardware Power Down Options
20 MHz and 50 MHz Speed Grades
44-Pin PLCC
APPLICATIONS
Frequency Synthesizers
Frequency, Phase or Amplitude Modulators
DDS Tuning
Digital Modulation
FSELECT
CLOCK
SDATA
SCLK
FREQ1
FREQ0
REG
REG
32-BIT PARALLEL REGISTER
V
32-BIT SERIAL REGISTER
AA
D0
32
32
MPU INTERFACE
MUX
32
GND
D15
ACCUMULATOR
PHASE
FUNCTIONAL BLOCK DIAGRAM
WR
32
CS
COMMAND REG
12
PHASE REG
12
12
TC0
phase modulation, frequency modulation, and both in-phase and
quadrature amplitude modulation suitable for QAM and SSB
generation.
Clock rates up to 20 MHz and 50 MHz are supported. Fre-
quency accuracy can be controlled to one part in 4 billion.
Modulation may be effected by loading registers either through
the parallel microprocessor interface or the serial interface. A
frequency-select pin permits selection between two frequencies
on a per cycle basis.
The serial and parallel interfaces may be operated independently
and asynchronously from the DDS clock; the transfer control
signals are internally synchronized to prevent metastability prob-
lems. The synchronizer can be bypassed to reduce the transfer
latency in the event that the microprocessor clock is synchro-
nous with the DDS clock.
A power-down pin allows external control of a power-down
mode (also accessible through the microprocessor interface)
The AD7008 is available in 44-pin PLCC.
PRODUCT HIGHLIGHT
1. Low Power
2. DSP/ P Interface
3. Completely Integrated
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
TRANSFER LOGIC
SIN/COS
ROM
COS
SIN
TC3
10
10
IQMOD [19:10]
IQMOD [9:0]
LOAD
10
10
10
10
TEST
10
FS ADJUST
AD7008
FULLSCALE
DDS Modulator
10-BIT DAC
RESET
ADJUST
V
REF
© Analog Devices, Inc., 1995
SLEEP
AD7008
COMP
IOUT
IOUT
Fax: 617/326-8703
CMOS

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AD7008JP50-REEL Summary of contents

Page 1

FEATURES Single +5 V Supply 32-Bit Phase Accumulator On-Chip COSINE and SINE Look-Up Tables On-Chip 10-Bit DAC Frequency, Phase and Amplitude Modulation Parallel and Serial Loading Software and Hardware Power Down Options 20 MHz and 50 MHz Speed Grades ...

Page 2

... V –0.9 V –0 0 4.75 5.25 4. 1.5/MHz 80 110 10 = 2.11 MHz. OUT . + I shown above –2– 390 , for MIN MAX SET LOAD AD7008JP50 Test Conditions/ Typ Max Units Comments Bits 50 MSPS Volts +1 LSB 1 LSB 50 MSPS CLK MHz OUT CLK MHz OUT dBc f = 6.25 MHz, ...

Page 3

... NOTE 1 May be reduced LOAD is synchronized to CLOCK and Setup ( CLOCK t 4 FSEL, LOAD, VALID TC3–TC0 t 5 Figure 1. Clock Synchronization Timing t 7 LOAD t 8 TC0–TC3 VALID Figure 2. Register Transfer Timing REV 5 unless otherwise noted MIN MAX AD7008JP50 Min Typ Max Units ...

Page 4

... PLCC P-44A AD7008/PCB* 1–3.5" Disk *AD7008/PCB DDS Evaluation Kit, assembled and tested. Kit includes an AD7008JP50. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7008 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...

Page 5

Mnemonic Function POWER SUPPLY V Positive power supply for the analog section. A 0.1 F decoupling capacitor should be connected between V AA AGND. This AGND Analog Ground. V Positive power supply for the digital section. A ...

Page 6

AD7008 14 PIPELINE DELAYS ACCUMULATOR 32 AD7008 REGISTER AND 12 CONTROL LOGIC 20 ACCUM RESET SLEEP AM ENABLE Figure 7. AD7008 CMOS DDS Modulator (See Table I) SLEEP (37) SCLK (41 SDATA (42) 32-BIT SERIAL ASSEMBLY ...

Page 7

Table I. Latency Table Latency Function (Synchronizer Enabled CR3 = 0 FSelect 14t 1 Phase 13t 1 IQ Mod 11t 1 NOTE 1 All latencies are reduced by 4t when CR3 = 1 (synchronizer disabled equal to one ...

Page 8

AD7008 CIRCUIT DESCRIPTION The AD7008 provides an exciting new level of integration for the RF/Communications system designer. The AD7008 com- bines the numerically controlled oscillator (NCO), SINE/CO- SINE look-up tables, frequency, phase and IQ modulators, and a digital-to-analog converter on ...

Page 9

When amplitude modulation is not required, the IQ multipliers can be bypassed (CR = 2). The sine output is directly sent to the 10-bit DAC. Digital-to-Analog Converter The AD7008 includes a high impedance current source 10-bit DAC, capable of driving ...

Page 10

AD7008 Parallel Configuration The AD7008 functions fully in the parallel mode. There are two parallel modes of operation. Both are similar but are tai- lored for different bus widths, 8 and 16 bits. All modes of op- eration can be ...

Page 11

AD607 Monoceiver(tm). This unique two chip combination provides a complete receiver sub- system with digital frequency control, RSSI and demodulated outputs for AM, FM and complex I/Q (SSB or QAM). (See Figure 13.) Direct Digital ...

Page 12

AD7008–Typical Performance Characteristics +5V V COMP REF 6 5 115 TO DAC TYP V REF AD7008 4 R SET Figure 17. Equivalent Reference Circuit REF 4.3 dBm OFFSET 3 330 000 dB/DIV RANGE 5.0 dBm START 0 Hz ...

Page 13

REF 5.0 dBm 10 dB/DIV RANGE 5.0 dBm START 0 Hz RBW 3 kHz VBW 10 kHz Figure 23 MHz, f CLK OUT REF 4.3 dBm 10 dB/DIV RANGE 5.0 dBm CENTER 6 500 000.0 Hz RBW ...

Page 14

AD7008–Typical Performance Characteristics REF 5.0 dBm OFFSET 4 500 000 dB/DIV RANGE 5.0 dBm START 0 Hz RBW 3 kHz VBW 10 kHz Figure 29 MHz, f CLK OUT REF 5.0 dBm OFFSET 11 100 ...

Page 15

AD7008/PCB DDS EVALUATION BOARD The AD7008/PCB DDS Evaluation Board allows designers to evaluate the high performance AD7008 DDS Modulator with a minimum amount of effort. To prove this DDS will meet the user’s waveform synthesis re- quirements, the only things ...

Page 16

AD7008 Controlling the AD7008/PCB The AD7008/PCB is designed to allow control (frequency specification, reset, etc.) through the parallel printer port of a standard IBM-compatible PC. The user simply disconnects the printer cable from the printer and inserts it into edge ...

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