NCV8402DDR2G ON Semiconductor, NCV8402DDR2G Datasheet

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NCV8402DDR2G

Manufacturer Part Number
NCV8402DDR2G
Description
Various MOSFETs N-Channel MOSFET 2.0 A 42V
Manufacturer
ON Semiconductor
Series
-r
Type
Low Sider
Datasheet

Specifications of NCV8402DDR2G

Input Type
*
Number Of Outputs
1
On-state Resistance
165 mOhm
Current - Output / Channel
-
Current - Peak Output
4.8A
Voltage - Supply
-
Operating Temperature
-
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCV8402DDR2G
Manufacturer:
ON
Quantity:
32 000
NCV8402D
Dual Self-Protected
Low-Side Driver with
Temperature and Current
Limit
protection features include overcurrent, overtemperature, ESD and
integrated Drain−to−Gate clamping for overvoltage protection. This
device offers protection and is suitable for harsh automotive
environments.
Features
Typical Applications
© Semiconductor Components Industries, LLC, 2009
Octtober, 2009 − Rev. 0
NCV8402D is a dual protected Low−Side Smart Discrete device. The
and Change Control
Short−Circuit Protection
Thermal Shutdown with Automatic Restart
Overvoltage Protection
Integrated Clamp for Inductive Switching
ESD Protection
dV/dt Robustness
Analog Drive Capability (Logic Level Input)
AEC−Q101 Qualified
NCV Prefix for Automotive and Other Applications Requiring Site
These Devices are Pb−Free and are RoHS Compliant
Switch a Variety of Resistive, Inductive and Capacitive Loads
Can Replace Electromechanical Relays and Discrete Circuits
Automotive / Industrial
1
*Max current limit value is dependent on input
†For information on tape and reel specifications,
NCV8402DDR2G
Gate
Input
condition.
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
(Clamped)
V
8
(BR)DSS
42 V
Device
ESD Protection
Source 1
Source 2
1
V8402D = Specific Device Code
A
L
Y
W
G
ORDERING INFORMATION
Gate 1
Gate 2
Temperature
http://onsemi.com
PIN ASSIGNMENT
Limit
165 mW @ 10 V
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
CASE 751
STYLE 11
1
R
Overvoltage
Protection
(Pb−Free)
DS(ON)
Package
SO−8
SOIC−8
Publication Order Number:
MARKING DIAGRAM
TYP
Current
Limit
8
Drain 1
Drain 1
Drain 2
Drain 2
2500/Tape & Reel
8
1
Shipping
Drain
NCV8402D/D
V8402D
ALYWX
Current
I
Sense
D
2.0 A*
Source
MAX
G

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NCV8402DDR2G Summary of contents

Page 1

... Pb−Free Package PIN ASSIGNMENT 1 Source 1 Gate 1 Source 2 Gate 2 ORDERING INFORMATION Device Package NCV8402DDR2G SOIC−8 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1 TYP I MAX D 2 ...

Page 2

MAXIMUM RATINGS (T = 25°C unless otherwise noted) J Drain−to−Source Voltage Internally Clamped Drain−to−Gate Voltage Internally Clamped Gate−to−Source Voltage Continuous Drain Current Power Dissipation Thermal Resistance Single Pulse Drain−to−Source Avalanche Energy ( 5 ...

Page 3

ELECTRICAL CHARACTERISTICS Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 3) Zero Gate Voltage Drain Current Gate Input Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Gate Threshold Temperature Coefficient Static Drain−to−Source On−Resistance Source−Drain Forward On Voltage SWITCHING CHARACTERISTICS (Note 5) ...

Page 4

T = 25°C Jstart T = 150°C Jstart (mH) Figure 2. Single Pulse Maximum Switch−off Current vs. Load Inductance 25°C Jstart 150°C Jstart 0.1 1 TIME IN CLAMP (ms) Figure ...

Page 5

150° 1 300 100°C, I 100° 0 200 25° 1 100 −40°C, I −40° 1 ...

Page 6

T (°C) Figure 14. Normalized Threshold Voltage vs. Temperature 200 150 100 t d(off d(on ...

Page 7

Duty Cycle = 50% 100 20 0.1 Single Pulse 0.01 0.0000001 0.000001 0.00001 0.0001 TYPICAL PERFORMANCE CURVES 0.001 0.01 0.1 PULSE WIDTH (sec) Figure 20. Transient Thermal Resistance http://onsemi.com 100 ...

Page 8

TEST CIRCUITS AND WAVEFORMS VIN RG Figure 21. Resistive Load Switching Test Circuit VIN td(ON) tr IDS Figure 22. Resistive Load Switching Waveforms http://onsemi.com VDD − DUT G S IDS td(OFF 90% 10% 90% 10% ...

Page 9

TEST CIRCUITS AND WAVEFORMS VIN RG tp Figure 23. Inductive Load Switching Test Circuit VIN VDS V DS(on) IDS Figure 24. Inductive Load Switching Waveforms http://onsemi.com L VDS D + VDD DUT G − S IDS ...

Page 10

... *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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