START540TR STMicroelectronics, START540TR Datasheet - Page 4

• Manufacturer Part Number: START540TR
• Description: RF Bipolar Small Signal NPN High Frequency
• Manufacturer: STMicroelectronics

Specifications of START540TR

• Dc Collector/base Gain Hfe Min: 100
• Mounting Style: SMD/SMT
• Configuration: Single
• Transistor Polarity: NPN
• Collector- Emitter Voltage Vceo Max: 4.5 V
• Emitter- Base Voltage Vebo: 1.5 V
• Continuous Collector Current: 0.04 A
• Power Dissipation: 180 mW
• Maximum Operating Temperature: + 150 C
• Package / Case: SOT-323-4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1: Bill of Materials
4. LNA PERFORMANCE.
The high intercept point START540 amplifier is biased at Vce=2V and Ic=5ma.
Table 2 shows the measured parameter values at 1900MHz, 25ºC,Icc=5mA,Vcc=3V
Table 2: Measured data
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AN1465 - APPLICATION NOTE
Parameter
Power Gain
Noise Figure
Input Return Loss
Output Return Loss
Isolation
Output Power at 1dBcp
Third-Order Intercept Point
C o m p o n en t
S u bstrate
T R 1
C 1
C 2
C 3
C 4
C 5
C 6
C 7
R 1
R 2
R 3
R 4
L 2
L 3
J1
J2
J3
1 6 0 o h m
1 6 0 o h m
1 5 o h m
1 0 0p F
1 0 0p F
0 o h m
V a lu e
5.6 n H
3.3 n H
1 0p F
4 7n F
4 7n F
2 2p F
F R 4
1
µ F
-
-
-
-
S O T -3 43
C a se _ A
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
06 0 3
S ize
-
-
-
-
Jo h n son 1 4 2 -0 7 01 -8 8 1
Jo h n son 1 4 2 -0 7 01 -8 8 1
V a riou s (e le ctro ly tic)
S T M icroe le ctro n ics
M u ra ta (G R M 3 9 )
M u ra ta (G R M 3 9 )
M u ra ta (G R M 3 9 )
M u ra ta (G R M 3 9 )
M u ra ta (G R M 3 9 )
M u ra ta (G R M 3 9 )
M u ra ta (L Q P 11 )
M u ra ta (L Q P 11 )
M an u fa c tu re r
V a rio u s
V a rio u s
V a rio u s
V a rio u s
V a rio u s
V a rio u s
Typical
1.25
-0.5
7.5
15
20
22
24
La ye r = 3 ;h =0 .0 3 in ch ; E r= 4 .5
R F C h o ke , In p u t M a tch in g
dBm
dBm
Unit
dB
dB
dB
dB
dB
S ta b ility Im p ro ve m e n t
R F o u tp u t co n n ecto r
R F C h o ke , S ta b ility
R F in p u t co nn e cto r
R F B yp a ss, B lo ck
R F B yp a ss, B lo ck
IP 3 Im p ro ve m e n t
IP 3 Im p ro ve m e n t
O utp u t d c block
Inp u t d c bloc k
D C co n n e ctor
Im p ro ve m e n t
S up p ly filte r
C o m m e n t
S ta rt5 40
D c b ia s
D c b ia s
Jum p er
Reference
Figure 10
Figure 13
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9