LM5575MHX National Semiconductor, LM5575MHX Datasheet - Page 15
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LM5575MHX
Manufacturer Part Number
LM5575MHX
Description
IC,SMPS CONTROLLER,CURRENT-MODE,TSSOP,16PIN,PLASTIC
Manufacturer
National Semiconductor
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Part Number:
LM5575MHX
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pacitance should be selected for RMS current rating and
minimum ripple voltage. A good approximation for the re-
quired ripple current rating necessary is I
Quality ceramic capacitors with a low ESR should be selected
for the input filter. To allow for capacitor tolerances and volt-
age effects, two 1.0µF, 100V ceramic capacitors will be used.
If step input voltage transients are expected near the maxi-
mum rating of the LM5575, a careful evaluation of ringing and
possible spikes at the device VIN pin should be completed.
An additional damping network or input voltage clamp may be
required in these cases.
C8
The capacitor at the VCC pin provides noise filtering and sta-
bility for the V
should be no smaller than 0.1µF, and should be a good qual-
ity, low ESR, ceramic capacitor. A value of 0.47µF was se-
lected for this design.
C7
The bootstrap capacitor between the BST and the SW pins
supplies the gate current to charge the buck switch gate at
turn-on. The recommended value of C7 is 0.022µF, and
should be a good quality, low ESR, ceramic capacitor.
C4
The capacitor at the SS pin determines the soft-start time, i.e.
the time for the reference voltage and the output voltage, to
reach the final regulated value. The time is determined from:
For this application, a C4 value of 0.01µF was chosen which
corresponds to a soft-start time of 1ms.
R5, R6
R5 and R6 set the output voltage level, the ratio of these re-
sistors is calculated from:
For a 5V output, the R5/R6 ratio calculates to 3.082. The re-
sistors should be chosen from standard value resistors, a
good starting point is selection in the range of 1.0kΩ - 10kΩ.
Values of 5.11kΩ for R5, and 1.65kΩ for R6 were selected.
R1, R2, C12
A voltage divider can be connected to the SD pin to set a
minimum operating voltage Vin
feature is required, the easiest approach to select the divider
resistor values is to select a value for R1 (between 10kΩ and
100kΩ recommended) then calculate R2 from:
Capacitor C12 provides filtering for the divider. The voltage at
the SD pin should never exceed 8V, when using an external
set-point divider it may be necessary to clamp the SD pin at
high input voltage conditions. The reference design utilizes
the full range of the LM5575 (6V to 75V); therefore these
components can be omitted. With the SD pin open circuit the
LM5575 responds once the Vcc UVLO threshold is satisfied.
CC
R5/R6 = (V
regulator. The recommended value of C8
OUT
/ 1.225V) - 1
(min)
for the regulator. If this
RMS
> I
OUT
/ 2.
15
R7, C11
A snubber network across the power diode reduces ringing
and spikes at the switching node. Excessive ringing and
spikes can cause erratic operation and couple spikes and
noise to the output. Voltage spikes beyond the rating of the
LM5575 or the re-circulating diode can damage these de-
vices. Selecting the values for the snubber is best accom-
plished through empirical methods. First, make sure the lead
lengths for the snubber connections are very short. For the
current levels typical for the LM5575 a resistor value between
5 and 20 Ohms is adequate. Increasing the value of the snub-
ber capacitor results in more damping but higher losses.
Select a minimum value of C11 that provides adequate damp-
ing of the SW pin waveform at high load.
R4, C5, C6
These components configure the error amplifier gain charac-
teristics to accomplish a stable overall loop gain. One advan-
tage of current mode control is the ability to close the loop with
only two feedback components, R4 and C5. The overall loop
gain is the product of the modulator gain and the error ampli-
fier gain. The DC modulator gain of the LM5575 is as follows:
The dominant low frequency pole of the modulator is deter-
mined by the load resistance (R
(C
For R
DC Gain
For the design example of Figure 1 the following modulator
gain vs. frequency characteristic was measured as shown in
Figure 8.
Components R4 and C5 configure the error amplifier as a type
II configuration which has a pole at DC and a zero at f
OUT
LOAD
). The corner frequency of this pole is:
DC Gain
(MOD)
FIGURE 8. Gain and Phase of Modulator
= 5Ω and C
R
LOAD
= 1 x 5 = 14dB
f
(MOD)
p(MOD)
= 5 Ohms and C
= G
OUT
= 1 / (2π R
m(MOD)
= 130µF then f
LOAD
x R
LOAD
,) and output capacitance
LOAD
OUT
C
= 130µF
OUT
= 1 x R
p(MOD)
)
20208815
= 245Hz
LOAD
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Z
= 1 /