NTMD3P03R2G ON Semiconductor, NTMD3P03R2G Datasheet

NTMD3P03R2G

Manufacturer Part Number

NTMD3P03R2G

Description

MOSFET PWR P-CHAN DUAL 30V 8SOIC

Manufacturer

ON Semiconductor

Datasheet

1.NTMD3P03R2G.pdf (6 pages)

Specifications of NTMD3P03R2G

Fet Type

2 P-Channel (Dual)

Fet Feature

Logic Level Gate

Rds On (max) @ Id, Vgs

85 mOhm @ 3.05A, 10V

Drain To Source Voltage (vdss)

30V

Current - Continuous Drain (id) @ 25° C

2.34A

Vgs(th) (max) @ Id

2.5V @ 250µA

Gate Charge (qg) @ Vgs

25nC @ 10V

Input Capacitance (ciss) @ Vds

750pF @ 24V

Power - Max

730mW

Mounting Type

Surface Mount

Package / Case

8-SOIC (3.9mm Width)

Configuration

Dual Dual Drain

Transistor Polarity

P-Channel

Resistance Drain-source Rds (on)

0.085 Ohms

Forward Transconductance Gfs (max / Min)

5 S

Drain-source Breakdown Voltage

- 30 V

Gate-source Breakdown Voltage

+/- 20 V

Continuous Drain Current

- 2.34 A

Power Dissipation

2 W

Maximum Operating Temperature

+ 150 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 55 C

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

NTMD3P03R2GOS

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

NTMD3P03R2G

Manufacturer:

ON/安森美

Quantity:

20 000

Current page: 1 of 6
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NTMD3P03R2

Power MOSFET

−3.05 Amps, −30 Volts

Dual P−Channel SOIC−8

Features

•

Applications

•

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. Minimum FR−4 or G−10 PCB, t = Steady State.

2. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick

3. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick

4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.

MAXIMUM RATINGS

February, 2006 − Rev. 2

Drain−to−Source Voltage

Gate−to−Source Voltage − Continuous

Thermal Resistance −

Operating and Storage

Single Pulse Drain−to−Source Avalanche

Energy − Starting T

= −7.5 Apk, L = 5 mH, R

Maximum Lead Temperature for Soldering

Purposes, 1/8″ from case for 10 seconds

Computers, Printers, PCMCIA Cards, Cellular & Cordless Telephones

High Efficiency Components in a Dual SOIC−8 Package

High Density Power MOSFET with Low R

Miniature SOIC−8 Surface Mount Package − Saves Board Space

Diode Exhibits High Speed with Soft Recovery

Avalanche Energy Specified

Mounting Information for the SOIC−8 Package is Provided

Pb−Free Package is Available

DC−DC Converters

Low Voltage Motor Control

Power Management in Portable and Battery−Powered Products, i.e.:

single sided), t = steady state.

single sided), t ≤ 10 seconds.

DSS

Junction−to−Ambient (Note 1)

Total Power Dissipation @ T

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

Junction−to−Ambient (Note 2)

Total Power Dissipation @ T

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

Junction−to−Ambient (Note 3)

Total Power Dissipation @ T

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

Temperature Range

= −30 Vdc, V

Specified at Elevated Temperature

Rating

= 25°C

= −4.5 Vdc, Peak I

= 25 W)

= 25°C unless otherwise noted)

= 25°C

Symbol

, T

DSS

qJA

DS(on)

stg

−55 to

Value

−2.34

−1.87

−3.05

−2.44

−3.86

+150

0.73

−8.0

1.25

62.5

−3.1

−30

±20

171

100

−12

−15

140

260

2.0

°C/W

Unit

°C

†For information on tape and reel specifications,

NTMD3P03R2

NTMD3P03R2G

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D

*For additional marking information, refer to

SUFFIX NB

(Note: Microdot may be in either location)

CASE 751

STYLE 11

−30 V

Application Note AND8002/D.

Device

SOIC−8

DSS

ED3P03= Specific Device Code

ORDERING INFORMATION

http://onsemi.com

= Assembly Location

= Year

= Work Week

= Pb−Free Package

85 mW @ −10 V

AND PIN ASSIGNMENT

(Pb−Free)

DS(ON)

MARKING DIAGRAM*

Package

P−Channel

SOIC−8

Publication Order Number:

D1 D1 D2 D2

S1 G1 S2 G2

Typ

AYWW G

ED3P03

2500/Tape & Reel

NTMD3P03R2/D

Shipping

−3.05 A

Max

†

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NTMD3P03R2G Summary of contents

Page 1

... J stg *For additional marking information, refer to +150 E 140 260 °C L NTMD3P03R2 NTMD3P03R2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D 1 http://onsemi.com V R Typ I Max DSS DS(ON) D − ...

Page 2

ELECTRICAL CHARACTERISTICS Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage ( Vdc −250 mAdc Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (V = −24 Vdc Vdc 25° ...

Page 3

TYPICAL ELECTRICAL CHARACTERISTICS − − − −4 25° −2 −5 ...

Page 4

150°C J 1000 T = 125°C J 100 −V , DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 7. Drain−to−Source Leakage Current vs. Voltage ...

Page 5

SINGLE PULSE T = 25° 1.0 dc 0.1 R LIMIT DS(on) THERMAL LIMIT PACKAGE LIMIT 0.01 1 1.0 −V , DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 13. Maximum Rated Forward Biased ...

Page 6

... *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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