NTMD2C02R2SG ON Semiconductor, NTMD2C02R2SG Datasheet

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NTMD2C02R2SG

Manufacturer Part Number
NTMD2C02R2SG
Description
MOSFET N/P-CH COMPL 20V 8-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NTMD2C02R2SG

Fet Type
N and P-Channel
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
43 mOhm @ 4A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
5.2A, 3.4A
Vgs(th) (max) @ Id
1.2V @ 250µA
Gate Charge (qg) @ Vgs
20nC @ 4.5V
Input Capacitance (ciss) @ Vds
1100pF @ 10V
Power - Max
2W
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NTMD2C02R2
Power MOSFET
2 Amps, 20 Volts
Complementary SOIC−8, Dual
and true logic level performance. They are capable of withstanding
high energy in the avalanche and commutation modes and the
drain−to−source diode has a very low reverse recovery time.
MiniMOSt devices are designed for use in low voltage, high speed
switching applications where power efficiency is important. Typical
applications are dc−dc converters, and power management in portable
and battery powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor controls
in mass storage products such as disk drives and tape drives.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Negative signs for P−Channel device omitted for clarity.
2. Mounted on 2″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided) with
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 1
MAXIMUM RATINGS
Drain−to−Source Voltage
N−Channel
P−Channel
Gate−to−Source Voltage
Drain Current
Operating and Storage Temperature Range
Total Power Dissipation @ T
Thermal Resistance − Junction to Ambient
Maximum Lead Temperature for Soldering
These miniature surface mount MOSFETs feature ultra low R
Battery Life
Ultra Low R
Logic Level Gate Drive − Can Be Driven by Logic ICs
Miniature SOIC−8 Surface Mount Package − Saves Board Space
Diode Is Characterized for Use In Bridge Circuits
Diode Exhibits High Speed, With Soft Recovery
I
Mounting Information for SOIC−8 Package Provided
Pb−Free Packages are Available
one die operating, 10 sec. max.
DSS
(Note 2)
(Note 2)
Purposes, 1/8″ from case for 10 seconds.
Specified at Elevated Temperature
DS(on)
− Continuous
− Pulsed
Rating
Provides Higher Efficiency and Extends
(T
J
= 25°C unless otherwise noted) (Note 1)
A
Preferred Device
= 25°C
N−Channel
N−Channel
P−Channel
P−Channel
Symbol
T
V
R
V
J
T
I
P
DSS
DM
T
I
qJA
GS
stg
and
D
D
L
−55 to
Value
62.5
±12
150
260
5.2
3.4
2.0
20
20
48
17
1
°C/W
DS(on)
Unit
Vdc
Vdc
°C
°C
W
A
†For information on tape and reel specifications,
Preferred devices are recommended choices for future use
and best overall value.
NTMD2C02R2
NTMD2C02R2G
NTMD2C02R2SG
G
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
R
R
8
Device
DS(on)
(Note: Microdot may be in either location)
CASE 751
STYLE 14
DS(on)
SOIC−8
N−Channel
1
D2C02 = Specific Device Code
x
A
Y
WW
G
ORDERING INFORMATION
D
= 120 mW (P−Channel)
http://onsemi.com
= 43 mW (N−Channel)
2 AMPERES
S
= Blank or S
= Assembly Location
= Year
= Work Week
= Pb−Free Package
20 VOLTS
(Pb−Free)
(Pb−Free)
Package
MARKING DIAGRAM &
SOIC−8
SOIC−8
SOIC−8
PIN ASSIGNMENT
Publication Order Number:
8
1
ND ND PD PD
NS NG PS PG
G
AYWW G
D2C02x
2500/Tape & Reel
2500/Tape & Reel
2500/Tape & Reel
G
P−Channel
NTMD2C02R2/D
Shipping
D
S

Related parts for NTMD2C02R2SG

NTMD2C02R2SG Summary of contents

Page 1

... NTMD2C02R2G T 260 °C L NTMD2C02R2SG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D Preferred devices are recommended choices for future use and best overall value. 1 http://onsemi ...

Page 2

ELECTRICAL CHARACTERISTICS Characteristic OFF CHARACTERISTICS Drain−Source Breakdown Voltage ( Vdc 250 mAdc Zero Gate Voltage Drain Current ( Vdc Vdc Vdc ...

Page 3

ELECTRICAL CHARACTERISTICS − continued Characteristic SOURCE−DRAIN DIODE CHARACTERISTICS (T Forward Voltage (Note Reverse Recovery Time Reverse Recovery Stored Charge 6. Negative signs for P−Channel device omitted for clarity. 7. Pulse Test: Pulse Width ≤ 300 ...

Page 4

TYPICAL ELECTRICAL CHARACTERISTICS N−Channel 0.07 0.06 0.05 0.04 0.03 0.02 0. GATE−TO−SOURCE VOLTAGE (VOLTS) GS Figure 5. On−Resistance versus Gate−To−Source Voltage 0. 25° 0.03 ...

Page 5

TYPICAL ELECTRICAL CHARACTERISTICS N−Channel 1000 125°C J 100 100° 25°C 0.1 0. DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 11. Drain−To−Source Leakage Current versus Voltage Switching behavior is ...

Page 6

N−Channel 2500 2000 C iss 1500 C rss 1000 500 C rss GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 13. Capacitance Variation ...

Page 7

... RR Compared to ON Semiconductor standard cell density low voltage MOSFETs, high cell density MOSFET diodes are faster (shorter t reverse recovery characteristic. The softness advantage of the high cell density diode means they can be forced through ...

Page 8

The Forward Biased Safe Operating Area curves define the maximum simultaneous drain−to−source voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (T ...

Page 9

TYPICAL ELECTRICAL CHARACTERISTICS 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 1.0E−05 1.0E−04 1.0E− Figure 25. Diode Reverse Recovery Waveform Normalized to qja at 10s. 0.0175 W 0.0710 W Chip 0.0154 ...

Page 10

INFORMATION FOR USING THE SOIC−8 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure ...

Page 11

For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones and a figure for belt speed. Taken together, these control settings ...

Page 12

... *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MiniMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC). Thermal Clad is a registered trademark of the Bergquist Company. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein ...

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