MAX7490CEE-T Maxim Integrated Products, MAX7490CEE-T Datasheet - Page 15
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
MAX7490CEE-T
Manufacturer Part Number
MAX7490CEE-T
Description
Active Filter
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX7490EEE.pdf
(18 pages)
Specifications of MAX7490CEE-T
Number Of Channels
2
Cutoff Frequency
40 KHz
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
5 V
Supply Voltage (min)
4.5 V
Package / Case
QSOP-16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 4. Output DC Offsets for a 2nd-Order Section
Figure 9. Dual-Supply Operation
The optimal input signal range is determined by
observing the voltage level at which the signal-to-noise
plus distortion (SINAD) ratio is maximized for a given
corner frequency. The Typical Operating Character-
istics show the THD + Noise response as the input sig-
nal’s peak-to-peak amplitude is varied. In most
systems, the input signal should be kept as large as
possible to maximize the signal-to-noise ratio (SNR).
Allow sufficient headroom to ensure no signal clipping
under expected operating conditions.
When using the MAX7490/MAX7491 for anti-aliasing or
post-DAC filtering, synchronize the DAC (or ADC) and
the filter clocks. If the clocks are not synchronized,
beat frequencies may alias into the desired passband.
V+
V-
*DRIVE SHDN TO V- FOR LOW-POWER
MODE
SHUTDOWN MODE.
1b
1
2
3
Anti-Aliasing and Post-DAC Filtering
CLOCK
Dual Universal Switched-Capacitor Filters
V
(R2 / R3)
V
(R2 / R3)
V
(V
(V
V
OS1
OS1
OS1
OS2
OS3
OS2
Input Signal Amplitude Range
______________________________________________________________________________________
[1 + (R2 / R3) + (R2 / R1)] - (V
[1 + (R2 / R3) + (R2 / R1)] - (V
[1 + (R2 / R3) + (R2 / R1) + (R2 / R4) -
)(R2 / R3)][R4 / R2 + R4] +
)[R2 / R2 + R4]
CLK
MAX7490
MAX7491
GND
V
V+
DD
V-
V OSN/HP
SHDN
COM
*
OS3
OS3
0.1μF
)
)
0.1μF
V OSBP
V
V
V
V
OS3
OS3
OS3
OS3
Aliasing is an inherent phenomenon of most switched-
capacitor filters. As with all sampled systems, frequen-
cy components of the input signal above one half the
sampling rate will be aliased. The MAX7490/MAX7491
sample at twice the clock frequency, yielding a 200:1
sampling to cutoff frequency ratio.
In particular, input signal components (f
sampling rate generate a difference frequency
(f
the filter. Such aliased signals, when they appear at the
output, are indistinguishable from real input informa-
tion. For example, the aliased output signal generated
when a 99kHz waveform is applied to a filter sampling
at 100kHz, (f
attenuated version of the output that would result from
a true 1kHz input. Since sampling is done at twice the
clock frequency, the Nyquist frequency is the same as
the clock frequency.
A simple passive RC lowpass input filter is usually suffi-
cient to remove input frequencies that can be aliased.
In many cases, the input signal itself may be band limit-
ed and require no special anti-alias filtering. Selecting
a passive filter cutoff frequency equal to f
12dB rejection at the Nyquist frequency.
Clock feedthrough is defined as the RMS value of the
clock frequency and its harmonics that are present at
the filter’s output pins, even without input signal. The
clock feedthrough can be greatly reduced by adding a
simple RC lowpass network at the final filter output.
Choose a cutoff frequency as low as possible to pro-
vide maximum noise attenuation. The attenuation and
phase shift of the external filter will limit the actual fre-
quency selected.
SAMPLING
V
(V
V
V
(R4 / R2) - (V
OSN/HP
OSN/HP
OS1
OSN/HP
- f
[1 + (R4 / R1) + (R4 / R2) + (R4 / R3)] - (V
CLK
IN
- V
- V
) that often falls within the passband of
- V
= 50kHz) is 1kHz. This waveform is an
OS2
OS2
OS2
OS3
)[1 + R5 / R6)]
)(R4 / R3)
V OSLP
Clock Feedthrough
IN
) near the
Aliasing
C
/2 gives
OS2
)
15