MCP79400T-I/MNY Microchip Technology, MCP79400T-I/MNY Datasheet - Page 8
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MCP79400T-I/MNY
Manufacturer Part Number
MCP79400T-I/MNY
Description
Real Time Clock I2C GP RTCC 64B SRAM ID
Manufacturer
Microchip Technology
Series
-r
Type
Clock/Calendarr
Datasheet
1.MCP79401T-IMNY.pdf
(38 pages)
Specifications of MCP79400T-I/MNY
Features
Alarm, Leap Year, SRAM
Memory Size
64B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C
Voltage - Supply
1.8 V ~ 5.5 V
Voltage - Supply, Battery
1.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-WFDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
MCP7940X
FIGURE 3-2:
3.1.2
A control byte is the first byte received following the
Start condition from the master device
The control byte consists of a control code; for the
MCP7940X this is set as ‘1010111’ for read and write
operations for the Unique ID after the correct unlock
sequence.
The control byte for accessing the SRAM and RTCC
registers are set to ‘1101111’. The RTCC registers and
the SRAM share the same address space.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’ a read operation is
selected, and when set to a ‘0’ a write operation is
FIGURE 3-3:
DS25009A-page 8
SCL
SDA
DEVICE ADDRESSING AND OPERATION
1
X = Don’t Care
X = Don’t Care
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
1
ACKNOWLEDGE TIMING
ADDRESS SEQUENCE BIT ASSIGNMENTS
1
CONTROL
SRAM RTCC CONTROL BYTE
2
Unique ID CONTROL BYTE
CONTROL
CODE
0
CODE
1
1
3
Data from transmitter
0
0
1
4
1
1
1
(Figure
1
5
1
1
R/W
3-2).
R/W
6
7
1
X
Acknowledge
selected. The next byte received defines the address of
the data byte
transferred first, followed by the Least Significant bits
(LSb).
Following the Start condition, the MCP7940X monitors
the SDA bus, checking the device type identifier being
transmitted.
‘1101111’ code, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the MCP7940X will select a read
or write operation.
8
1
•
Bit
ADDRESS BYTE
ADDRESS BYTE
1
9
•
1
•
1
(Figure
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
Upon
0
Data from transmitter
•
A
2
•
2
3-3). The upper address bits are
receiving
A
1
•
2011 Microchip Technology Inc.
A
0
3
A
0
an
‘1010111’
or