DS1646-120 Maxim Integrated Products, DS1646-120 Datasheet - Page 5

• Manufacturer Part Number: DS1646-120
• Description: Real Time Clock
• Manufacturer: Maxim Integrated Products

Specifications of DS1646-120

• Function: Clock, Calendar, NV Timekeeping RAM
• Rtc Memory Size: 131072 B
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Rtc Bus Interface: Parallel
• Package / Case: eDIP
• Time Format: HH:MM:SS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CLOCK ACCURACY (DIP MODULE)
The DS1646 is guaranteed to keep time accuracy to within ±1 minute per month at 25°C. The RTC is
calibrated at the factory by Dallas Semiconductor using nonvolatile tuning elements, and does not require
additional calibration. For this reason, methods of field clock calibration are not available and not
necessary. Clock accuracy is also affected by the electrical environment and caution should be taken to
place the RTC in the lowest level EMI section of the PCB layout. For additional information refer to
Application Note 58.
CLOCK ACCURACY (POWERCAP MODULE)
The DS1646 and DS9034PCX are each individually tested for accuracy. Once mounted together, the
module will typically keep time accuracy to within ±1.53 minutes per month (35 ppm) at 25°C. Clock
accuracy is also affected by the electrical environment and caution should be taken to place the RTC in
the lowest level EMI section of the PCB layout. For additional information refer to Application Note 58.
1646 REGISTER MAP—BANK1 Table 2
Note: All indicated “X” bits are unused but must be set to “0” during write cycles to ensure proper clock
operation.
RETRIEVING DATA FROM RAM OR CLOCK
The DS1646 is in the read mode whenever
device architecture allows ripple-through access to any of the address locations in the NVSRAM. Valid
data will be available at the DQ pins within t
and
available at the latter of chip-enable access (t
data input/output pins (DQ) is controlled by
lines are driven to an intermediate state until t
remain valid, output data will remain valid for output data hold time (t
until the next address access.
OS C = Stop Bit
W = Write Bit
ADDRESS
1FFFD
1FFFA
1FFFE
1FFFC
1FFFB
1FFFF
1FFF9
1FFF8
OE
access times and states are satisfied. If
OSC
B
—
W
X
X
X
X
X
7
R = Read Bit
X = Unused
FT
B
—
—
—
X
X
X
R
6
B
—
—
—
—
X
X
X
-
5
FT = Frequency Test
B
—
—
—
—
—
—
X
X
4
DATA
AA
CE
CEA
WE
after the last address input is stable, providing that the
AA
) or at output enable access time (t
and
B
—
—
—
—
—
—
CE
X
X
5 of 12
. If the address inputs are changed while
(write enable) is high;
3
or
OE
OE
. If the outputs are activated before t
B
—
—
—
—
—
—
—
X
2
access times are not met, valid data will be
B
—
—
—
—
—
—
—
X
1
OH
) but will then go indeterminate
B
—
—
—
—
—
—
—
X
CE
0
(chip enable) is low. The
Minutes
Seconds
Control
Month
OEA
Hour
Year
Date
Day
FUNCTION
). The state of the
DS1646/DS1646P
CE
AA
, the data
00–99
01–12
01–31
01–07
00–23
00–59
00–59
and
A
CE
OE