M48T37Y-70MH1 STMicroelectronics, M48T37Y-70MH1 Datasheet - Page 10

• Manufacturer Part Number: M48T37Y-70MH1
• Description: Real Time Clock 256K (32Kx8) 70ns
• Manufacturer: STMicroelectronics

Specifications of M48T37Y-70MH1

• Function: Clock, Calendar, NV Timekeeping RAM, Watchdog Timer, Battery Backup, Alarm
• Rtc Memory Size: 32768 B
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Parallel
• Package / Case: SOIC-44
• Time Format: HH:MM:SS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Operation modes
2.2
10/30
WRITE mode
The M48T37Y/V is in the WRITE mode whenever W and E are low. The start of a WRITE is
referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the
earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W
must return high for a minimum of t
to the initiation of another READ or WRITE cycle. Data-in must be valid t
end of WRITE and remain valid for t
cycles to avoid bus contention; however, if the output bus has been activated by a low on E
and G, a low on W will disable the outputs t
Figure 5.
Figure 6.
A0-A14
E
W
DQ0-DQ7
A0-A14
E
W
DQ0-DQ7
WRITE enable controlled, WRITE AC waveform
Chip enable controlled, WRITE AC waveforms
tAVEL
tAVEL
tAVWL
tAVWL
Doc ID 7019 Rev 9
tWLQZ
EHAX
WHDX
from chip enable or t
tAVWH
tAVEH
afterward. G should be kept high during WRITE
tWLWH
WLQZ
VALID
tAVAV
VALID
tAVAV
tELEH
after W falls.
tDVEH
tDVWH
DATA INPUT
DATA INPUT
tWHDX
WHAX
from WRITE enable prior
tEHDX
M48T37Y, M48T37V
DVWH
tWHQX
tEHAX
tWHAX
prior to the
AI00927
AI00926