MAX4840EXT-T Maxim Integrated Products, MAX4840EXT-T Datasheet - Page 6

• Manufacturer Part Number: MAX4840EXT-T
• Description: Communication ICs - Various
• Manufacturer: Maxim Integrated Products
• Type: Overvoltage Protection Controllerr

Specifications of MAX4840EXT-T

• Mounting Style: SMD/SMT
• Package / Case: SC-70-6
• Supply Current: 0.14 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Overvoltage Protection Controllers with
Status FLAG
Figure 5. Functional Diagram
The MAX4838–MAX4842 provide up to 28V overvoltage
protection for low-voltage systems. When the input volt-
age exceeds the overvoltage trip level, the MAX4838–
MAX4842 turn off a low-cost external n-channel FET(s)
to prevent damage to the protected components. An
internal charge pump (Figure 5) drives the FET gate for
a simple, robust solution.
The MAX4838–MAX4841 have a fixed 3.25V typical
undervoltage lockout level (UVLO) while the MAX4842
has a 3.0V typical UVLO. When V
UVLO, the GATE driver is held low and FLAG is asserted.
The MAX4838/MAX4839 have a 7.4V typical overvoltage
threshold (OVLO), and the MAX4840/MAX4841 have a
5.8V typical overvoltage threshold. The MAX4842 has a
4.7V typical overvoltage threshold. When V
than OVLO, the GATE driver is held low and FLAG is
asserted.
The FLAG output is used to signal the host system
there is a fault with the input voltage. FLAG asserts
immediately to an overvoltage fault. FLAG is held low
for 50ms after GATE turns on before deasserting.
The MAX4839 and MAX4841 have a push-pull FLAG out-
put. The output high voltage is proportional to V
up to 5.5V, and fixed at 5.5V when V
The MAX4838/MAX4840/MAX4842 have an open-drain
FLAG output. Connect a pullup resistor from FLAG to
the logic I/O voltage of the host system.
6
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Undervoltage Lockout (UVLO)
Overvoltage Lockout (OVLO)
Detailed Description
GND
EN
IN
IN
IN
> 5.5V.
FLAG Output
is less than the
REGULATOR
UVLO AND
DETECTOR
IN
OVLO
5.5V
is greater
IN
for V
IN
LOGIC AND TIMER
2x CHARGE
CONTROL
EN is an active-low enable input on the MAX4838/
MAX4840/MAX4842 only. Drive EN low or connect to
ground to enable normal device operation. Drive EN
high to force the external MOSFET(s) off. EN does not
override an OVLO or UVLO fault.
An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOSFETS.
The charge pump operates from the internal 5.5V
regulator.
The actual GATE output voltage tracks approximately
two times V
level is exceeded, whichever comes first. The
MAX4838/MAX4839 have a 7.4V typical OVLO, there-
fore GATE remains relatively constant at about 10.5V
for 5.5V < V
5.8V typical OVLO, but this can be as low as 5.5V. The
MAX4840/MAX4841 in practice may never actually
achieve the full 10.5V GATE output. The MAX4842 has
a 4.7V (typ) OVLO and the GATE output voltage is 2x
the input voltage. The GATE output voltage as a func-
tion of input voltage is shown in the Typical Operating
Characteristics.
The MAX4838–MAX4842 have an on-board state
machine to control device operation. A flowchart is
shown in Figure 6. On initial power-up, if V
if V
If UVLO < V
startup after a 50ms internal delay. The internal charge
pump is enabled, and GATE begins to be driven above
V
ing startup until the FLAG blanking period expires, typi-
PUMP
IN
IN
by the internal charge pump. FLAG is held low dur-
> OVLO, GATE is held at 0V, and FLAG is low.
IN
IN
IN
GATE DRIVER
< OVLO and EN is low, the device enters
MAX4838–
until V
MAX4842
< 7.4V. The MAX4840/MAX4841 have a
IN
exceeds 5.5V or the OVLO trip
GATE
FLAG
Device Operation
EN Enable Input
GATE Driver
IN
< UVLO or