MAX3353EEBP-T Maxim Integrated Products, MAX3353EEBP-T Datasheet - Page 13

• Manufacturer Part Number: MAX3353EEBP-T
• Description: Communication ICs - Various
• Manufacturer: Maxim Integrated Products
• Type: USB On-the-Go Charge Pumpr

Specifications of MAX3353EEBP-T

• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V, 5 V
• Supply Type: Analog
• Package / Case: UCSP-20
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.6 V
• Supply Current: 73 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 1. MAX3353E Address Map
Table 2. Register Address Map
Manufacturer
Register 0
Manufacturer
Register 1
Manufacturer
Register 2
Manufacturer
Register 3
Product ID
Register 0
Product ID
Register 1
Product ID
Register 2
Product ID
Register 3
Reserved
Control
Register 1
Control
Register 2
Reserved
Status
Register
Inter r up t M ask
Inter r up t E d g e
Interrupt
Latch
Reserved
ADD PIN
Float or
GND
NAME
V
USB On-the-Go Charge Pump with Switchable
L
A
0
0
6
08h-0Fh
17h -Ffh
ADD
00h
01h
02h
03h
04h
05h
06h
07h
10h
11h
12h
13h
14h
15h
16h
______________________________________________________________________________________
A
1
1
5
A_HNP_RQ
PULLDWN
A
ADDRESS BITS
0
0
BIT 7
DM_
4
—
—
—
—
—
—
—
0
0
0
0
0
0
0
0
A
1
1
3
FLOAT_RQ
PULLDWN
B_HNP
BIT 6
A
DP_
ID_
1
1
—
—
—
—
—
—
1
0
1
0
1
1
1
0
2
A
0
0
1
A_HNP_EN
GND_RQ
PULLUP
A_HNP
BIT 5
DM_
ID_
—
—
—
—
—
1
0
0
1
0
0
0
0
A
0
1
Pullup/Pulldown Resistors
0
FLOAT_EN
ID_FLOAT
SESSION_
END_RQ
PULLUP
There are three interrupt registers. Interrupt mask regis-
ter is a read/write register used to enable interrupts and
read status of interrupts. Interrupt edge register is a
read/write register for setting and determining inter-
rupts for positive and negative edges. Interrupt latch
register is a read only register to check and validate
interrupt requests. Table 8 shows the interrupt mask,
DISCHG
V
BIT 4
DP_
BUS_
ID_
—
—
—
—
0
0
1
1
0
1
0
0
SESSION_
VALID_RN
V
GND_EN
ID_GND
BUS_DRV
BIT 3
ID_
—
—
—
—
—
1
1
0
0
1
1
0
0
Interrupt Registers (14h, 15h, 16h)
V
SESSION_
SESSION_
VALID_RN
BUS_CHG2
END_EN
ACONN
BDISC_
V
BIT 2
END
BUS_
—
—
—
—
0
0
0
0
0
0
0
0
IRQ_MODE
V
SESSION_
SESSION_
VALID_EN
SESSION_
VALID_ED
SESSION_
VALID_RP
BUS_CHG1
VALID
BIT 1
—
—
—
1
1
1
1
0
1
1
0
V
BUS_VALID
VALID_EN
VALID_ED
VALID_RP
SDWN
V
V
V
BIT 0
BUS_
BUS_
BUS_
—
—
—
—
0
1
1
1
0
0
0
1
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