DS2152LN Maxim Integrated Products, DS2152LN Datasheet - Page 41

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DS2152LN

Manufacturer Part Number
DS2152LN
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2152LN

Product
Framer
Number Of Transceivers
1
Data Rate
2.048 Mbps
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Supply Current (max)
75 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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6.2 Path Code Violation Count Register (PCVCR)
When the receive side of the DS2152 is set to operate in the ESF framing mode (CCR2.3 = 1), PCVCR
will automatically be set as a 12-bit counter that will record errors in the CRC6 codewords. When set to
operate in the D4 framing mode (CCR2.3 = 0), PCVCR will automatically count errors in the Ft framing
bit position. Via the RCR2.1 bit, the DS2152 can be programmed to also report errors in the Fs framing
bit position. The PCVCR will be disabled during receive loss of synchronization (RLOS=1) conditions.
See
PCVCR1: PATH VIOLATION COUNT REGISTER 1 (Address = 25 Hex)
PCVCR2: PATH VIOLATION COUNT REGISTER 2 (Address = 26 Hex)
Note 1: The upper nibble of the counter at address 25 is used by the Multiframes Out of Sync Count Register.
Note 2: PCVCR counts either errors in CRC codewords (in the ESF framing mode; CCR2.3 = 1) or errors in the framing bit position (in the
D4 framing mode; CCR2.3 = 0).
Table 6-2. Path Code Violation Counting Arrangements
6.3 Multiframes Out of Sync Count Register (MOSCR)
Normally, the MOSCR is used to count the number of multiframes that the receive synchronizer is out of
sync (RCR2.0 = 1). This number is useful in ESF applications needing to measure the parameters Loss Of
Frame Count (LOFC) and ESF Error Events as described in AT&T publication TR54016. When the
MOSCR is operated in this mode, it is not disabled during receive loss of synchronization (RLOS = 1)
conditions. The MOSCR has alternate operating mode whereby it will count either errors in the Ft
framing pattern (in the D4 mode) or errors in the FPS framing pattern (in the ESF mode). When the
MOSCR is operated in this mode, it is disabled during receive loss of synchronization (RLOS = 1)
conditions. See
(MSB)
CRC/FB7
FRAMING MODE
(Note 1)
CRC/FB11
SYMBOL
CRC/FB0
Table 6-2
(CCR2.3)
ESF
D4
D4
CRC/FB6
(Note 1)
for a detailed description of exactly what errors the PCVCR counts.
Table 6-3
POSITION NAME AND DESCRIPTION
PCVCR1.3
PCVCR2.0
CRC/FB5
COUNT Fs ERRORS?
(Note 1)
for a detailed description of what the MOSCR is capable of counting.
Don’t Care
(RCR2.1)
MSB of the 12-Bit CRC6 Error or Frame Bit Error Count (Note 2)
LSB of the 12-Bit CRC6 Error or Frame Bit Error Count (Note 2)
Yes
No
CRC/FB4
(Note 1)
CRC/FB3
CRC/FB11
41 of 97
Errors in the Ft pattern
Errors in both the Ft and Fs patterns
Errors in the CRC6 codewords
WHAT IS COUNTED IN THE
CRC/FB2
CRC/FB10
PCVCRs
CRC/FB9
CRC/FB1
CRC/FB8
CRC/FB0
(LSB)
PCVCR1
PCVCR2

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