AD9912/PCBZ Analog Devices Inc, AD9912/PCBZ Datasheet - Page 11
![Eval Board](/photos/9/29/92970/ad9912_pcbz_sml.jpg)
AD9912/PCBZ
Manufacturer Part Number
AD9912/PCBZ
Description
Eval Board
Manufacturer
Analog Devices Inc
Series
AgileRF™r
Specifications of AD9912/PCBZ
Kit Features
Flexible System Clock I/P Accepts Crystal
Supported Devices
AD9912
Tool / Board Applications
Direct Digital Synthesizer
Development Tool Type
Hardware - Eval/Demo Board
Mcu Supported Families
AD9912
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9912
Primary Attributes
14-Bit DAC, 48-Bit Tuning Word Width
Secondary Attributes
1GHz, Graphical User Interface
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
TYPICAL PERFORMANCE CHARACTERISTICS
AVDD, AVDD3, and DVDD at nominal supply voltage; DAC R
phase noise used for generating these plots.
Figure 3. Wideband SFDR vs. Output Frequency at −40°C, +25°C, and +85°C,
Figure 4. Variation of Wideband SFDR vs. Frequency over DAC Power Supply
–100
–50
–55
–60
–65
–70
–75
–80
–50
–55
–60
–65
–70
–75
–80
–10
–20
–30
–40
–50
–60
–70
–80
–90
10
0
0
0
0
Voltage, SYSCLK = 1 GHz (SYSCLK PLL Bypassed)
SYSCLK = 1 GHz (SYSCLK PLL Bypassed)
SYSCLK = 1 GHz (SYSCLK PLL Bypassed)
Figure 5. Wideband SFDR at 20.1 MHz,
100
100
100
OUTPUT FREQUENCY (MHz)
OUTPUT FREQUENCY (MHz)
FREQUENCY (MHz)
200
200
200
CARRIER:
SFDR:
FREQ. SPAN:
RESOLUTION BW:
VIDEO BW:
300
300
300
HIGH V
NORMAL V
LOW V
400
400
400
+25°C
–40°C
+85°C
20.1MHz
–79dBc
500MHz
3kHz
10kHz
DD
DD
DD
500
500
500
Rev. F | Page 11 of 40
SET
= 10 kΩ, unless otherwise noted. See Figure 26 for 1 GHz reference
–100
–100
–100
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
10
10
10
0
0
0
0
0
0
CARRIER:
SFDR:
FREQ. SPAN:
RESOLUTION BW:
VIDEO BW:
Figure 7. Wideband SFDR at 201.1 MHz,
Figure 8. Wideband SFDR at 398.7 MHz,
SYSCLK = 1 GHz (SYSCLK PLL Bypassed)
SYSCLK = 1 GHz (SYSCLK PLL Bypassed)
SYSCLK = 1 GHz (SYSCLK PLL Bypassed)
Figure 6. Wideband SFDR at 98.6 MHz,
100
100
100
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
398.7MHz
–59dBc
500MHz
3kHz
10kHz
200
200
200
CARRIER:
SFDR:
FREQ. SPAN:
RESOLUTION BW:
VIDEO BW:
CARRIER:
SFDR:
FREQ. SPAN:
RESOLUTION BW:
VIDEO BW:
300
300
300
400
400
400
201.1MHz
–61dBc
500MHz
3kHz
10kHz
98.6MHz
–67dBc
500MHz
3kHz
10kHz
AD9912
500
500
500