MAX5415EUD-T Maxim Integrated Products, MAX5415EUD-T Datasheet - Page 7

• Manufacturer Part Number: MAX5415EUD-T
• Description: Digital Potentiometer ICs
• Manufacturer: Maxim Integrated Products

Specifications of MAX5415EUD-T

• Number Of Pots: Dual
• Taps Per Pot: 256
• Resistance: 100 KOhms
• Wiper Memory: Volatile
• Digital Interface: Serial (3-Wire, SPI)
• Operating Supply Voltage: 5 V
• Supply Current: 0.8 uA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Package / Case: TSSOP-14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Dual, 256-Tap, Low-Drift, Digital Potentiometers
Figure 1. MAX5413/MAX5414/MAX5415 Functional Diagram: Dual 3-Terminal Potentiometers in 14-Pin TSSOP Configuration
Each potentiometer consists of 255 fixed resistors in
series between pins H
tiometer wiper (pin W
any one of the 256 different tap points on the resistor
string. The MAX5413/MAX5414/MAX5415 require nine
bits to program the wiper position. The first bit is an
address code, allowing one or the other potentiometer
5, 6, 10
PIN
11
12
13
14
1
2
3
4
7
8
9
_______________________________________________________________________________________
NAME
SCLK
GND
N.C.
V
DIN
X
W
W
H
CS
H
L
L
Detailed Description
DD
SCLK
) can be programmed to access
X
B
A
GND
B
A
B
A
V
DIN
CS
DD
and L
X
REGISTER
DECODE
Ground
Low Terminal of Resistor B
High Terminal of Resistor B
Wiper Terminal of Resistor B
No Connection to this Terminal
SPI Chip Select
SPI Serial Data Input
SPI Clock Input
Power Supply, +2.7V to +5.5V. Connect a 0.1µF capacitor to GND.
Wiper Terminal of Resistor A
High Terminal of Resistor A
Low Terminal of Resistor A
(Figure 1). The poten-
SHIFT
9-BIT
SR
R
8
POR
LATCH
LATCH
8-BIT
8-BIT
R
R
8
8
to be selected for programming. The potentiometers
are programmed independently of each other.
The MAX5413/MAX5414/MAX5415 use a 3-wire serial
data interface to control the wiper tap position. This
write-only interface contains three inputs: Chip Select
(CS), Data In (DIN), and Data Clock (SCLK). When CS
is taken low, data from the DIN pin is synchronously
loaded into the serial shift register on each rising edge
of each SCLK pulse (Figure 2). After all the data bits
DECODE
DECODE
256
256
FUNCTION
MAX5413
MAX5414
MAX5415
in 14-Pin TSSOP
H
W
L
H
W
L
A
B
A
B
A
B
Pin Description
7