MAX5481EUD Maxim Integrated Products, MAX5481EUD Datasheet - Page 10

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MAX5481EUD

Manufacturer Part Number
MAX5481EUD
Description
Digital Potentiometer ICs
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5481EUD

Number Of Pots
Single
Taps Per Pot
1024
Resistance
10 KOhms
Wiper Memory
Non Volatile
Digital Interface
Serial (3-Wire, SPI)
Operating Supply Voltage
5 V
Supply Current
1 uA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.25 V
Supply Voltage (min)
2.7 V
Package / Case
TSSOP-14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX5481EUD
Manufacturer:
MAXIM/美信
Quantity:
20 000
10-Bit, Nonvolatile, Linear-Taper Digital
Potentiometers
(MAX5483/MAX5484 Variable Resistors)
10
4–7, 15
TQFN
8, 16
10
11
12
13
14
______________________________________________________________________________________
1
2
3
9
PIN
7, 8, 9, 13
TSSOP
12
11
10
14
6
5
4
3
2
1
SCLK(INC) Wiper Increment Control Input (SPI/UD = 0). With CS low, the wiper position moves in the
DIN(U/D)
SPI/UD
NAME
D.N.C.
GND
N.C.
V
V
CS
EP
W
L
DD
SS
No Connection. Not internally connected.
Do Not Connect. Leave unconnected for proper operation.
Wiper Terminal
Low Terminal
Negative Power-Supply Input. For single-supply operation, connect V
supply operation, -2.5V ≤ V
with a 0.1µF ceramic capacitor as close to the device as possible.
Interface-Mode Select. Select serial SPI interface when SPI/UD = 1. Select serial up/down
interface when SPI/UD = 0.
Serial SPI Interface Data Input (SPI/UD = 1)
Up/Down Control Input (SPI/UD = 0). With DIN(U/D) low, a high-to-low SCLK(INC) transition
decrements the wiper position. With DIN(U/D) high, a high-to-low SCLK(INC) transition
increments the wiper position.
Serial SPI Interface Clock Input (SPI/UD = 1)
direction determined by the state of DIN(U/D) on a high-to-low transition.
Active-Low Digital Input Chip Select
Ground
Positive Power-Supply Input (+2.7V ≤ V
ceramic capacitor as close to the device as possible.
Exposed Pad (TQFN Only). Externally connect EP to V
SS
≤ -0.2V as long as (V
DD
FUNCTION
Pin Description (continued)
≤ +5.25V). Bypass V
DD
SS
- V
SS
or leave unconnected.
) ≤ 5.25V. Bypass V
DD
to GND with a 0.1µF
SS
to GND. For dual-
SS
to GND

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