IRFI9Z14GPBF Vishay, IRFI9Z14GPBF Datasheet - Page 7

MOSFET P-CH 60V 5.3A TO220FP

IRFI9Z14GPBF

Manufacturer Part Number
IRFI9Z14GPBF
Description
MOSFET P-CH 60V 5.3A TO220FP
Manufacturer
Vishay
Datasheets

Specifications of IRFI9Z14GPBF

Transistor Polarity
P-Channel
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
500 mOhm @ 3.2A, 10V
Drain To Source Voltage (vdss)
60V
Current - Continuous Drain (id) @ 25° C
5.3A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
12nC @ 10V
Input Capacitance (ciss) @ Vds
270pF @ 25V
Power - Max
27W
Mounting Type
Through Hole
Package / Case
TO-220-3 Full Pack (Straight Leads, Isolated), ITO-220AB
Minimum Operating Temperature
- 55 C
Configuration
Single
Resistance Drain-source Rds (on)
0.5 Ohm @ 10 V
Drain-source Breakdown Voltage
60 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
5.3 A
Power Dissipation
27000 mW
Maximum Operating Temperature
+ 175 C
Mounting Style
Through Hole
Continuous Drain Current Id
-5.3A
Drain Source Voltage Vds
-60V
On Resistance Rds(on)
500mohm
Rds(on) Test Voltage Vgs
-10V
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
*IRFI9Z14GPBF
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91170.
Document Number: 91170
S09-0062-Rev. A, 02-Feb-09
Re-applied
voltage
Reverse
recovery
current
+
R
-
Compliment N-Channel of D.U.T. for driver
D.U.T.
G
*
Driver gate drive
D.U.T. I
D.U.T. V
Inductor current
V
GS
P.W.
= - 5 V for logic level and - 3 V drive devices
SD
DS
waveform
waveform
Peak Diode Recovery dV/dt Test Circuit
Ripple ≤ 5 %
Body diode forward drop
Period
Body diode forward
+
-
Fig. 14 - For P-Channel
• dV/dt controlled by R
• I
• D.U.T. - device under test
SD
Diode recovery
current
controlled by duty factor "D"
Circuit layout considerations
dV/dt
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
dI/dt
D =
-
G
Period
P.W.
+
IRFI9Z14G, SiHFI9Z14G
V
V
I
SD
GS
DD
= - 10 V*
+
-
V
DD
Vishay Siliconix
www.vishay.com
7

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