NTD3055L170-1G ON Semiconductor, NTD3055L170-1G Datasheet - Page 5

MOSFET N-CH 60V 9A IPAK

NTD3055L170-1G

Manufacturer Part Number
NTD3055L170-1G
Description
MOSFET N-CH 60V 9A IPAK
Manufacturer
ON Semiconductor
Datasheet

Specifications of NTD3055L170-1G

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
170 mOhm @ 4.5A, 5V
Drain To Source Voltage (vdss)
60V
Current - Continuous Drain (id) @ 25° C
9A
Vgs(th) (max) @ Id
2V @ 250µA
Gate Charge (qg) @ Vgs
10nC @ 5V
Input Capacitance (ciss) @ Vds
275pF @ 25V
Power - Max
1.5W
Mounting Type
Surface Mount
Package / Case
IPak, TO-251, DPak, VPak (3 straight leads + tab)
Configuration
Single
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.17 Ohms
Forward Transconductance Gfs (max / Min)
7.3 S
Drain-source Breakdown Voltage
60 V
Gate-source Breakdown Voltage
+/- 15 V
Continuous Drain Current
9 A
Power Dissipation
28.5 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NTD3055L170-1G
Manufacturer:
ON
Quantity:
12 500
the maximum simultaneous drain−to−source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (T
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance −
General Data and Its Use.”
traverse any load line provided neither rated peak current
(I
transition time (t
power averaged over a complete switching cycle must not
exceed (T
in switching circuits with unclamped inductive loads. For
DM
The Forward Biased Safe Operating Area curves define
Switching between the off−state and the on−state may
A Power MOSFET designated E−FET can be safely used
5
4
3
2
1
6
0
) nor rated voltage (V
0
Figure 8. Gate−To−Source and Drain−To−Source
V
J(MAX)
GS
Q
1
r
1
,t
Voltage versus Total Charge
− T
Q
f
) do not exceed 10 ms. In addition the total
G
, TOTAL GATE CHARGE (nC)
C
)/(R
qJC
2
).
Q
DSS
T
DRAIN−TO−SOURCE DIODE CHARACTERISTICS
) is exceeded and the
10
Q
8
6
4
2
0
2
0.6
3
Figure 10. Diode Forward Voltage versus Current
0.64
V
T
V
J
GS
SD
= 25°C
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
I
T
= 0 V
D
SAFE OPERATING AREA
0.68
J
4
C
= 9 A
= 25°C
) of 25°C.
http://onsemi.com
0.72
5
0.76
5
0.8
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
drain−to−source avalanche at currents up to rated pulsed
current (I
continuous current (I
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
currents below rated continuous I
equal the values indicated.
1000
100
Although many E−FETs can withstand the stress of
10
1
0.84
1
DM
0.88
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
), the energy rating is specified at rated
t
t
d(off)
d(on)
t
t
R
r
f
0.92
G
, GATE RESISTANCE (OHMS)
D
), in accordance with industry custom.
0.96
10
D
can safely be assumed to
V
I
V
D
DS
GS
= 9 A
= 30 V
= 5 V
100

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