AD598SD/883B Analog Devices Inc, AD598SD/883B Datasheet - Page 6

• Manufacturer Part Number: AD598SD/883B
• Description: LVDT IC
• Manufacturer: Analog Devices Inc

DSCC FORM 2234
APR 97
1/
2/
3/
4/
5/
V
The limiting terms “min” (minimum) and “max” (maximum) shall be considered to apply to magnitudes only.
Negative current shall be defined as conventional current flow out of a device terminal.
Nonlinearity of the device only in units of ppm of full scale. Nonlinearity is defined as the maximum measured deviation
of the output voltage from a straight line. The straight line is determined by connecting the maximum produced full-scale
negative voltage with the maximum produced full-scale positive voltage.
From –55 C to +125 C, the overall error alone is determined by combing gain error, gain drift, and offset drift.
For example, the worst-case overall error from –55 C to +125 C is calculated as follows: Overall error = gain error at
+25 C ( 1 percent full scale) + gain drift from +25 C to +125 C (50 ppm/ C FS x +100 C) + offset drift from +25 C to
+125 C (50 ppm/ C of FS x 110 C) = 2 percent of full scale. Note that 1000 ppm of full scale equals 0.1 percent of full
scale. Full scale is defined as the difference between the maximum positive and the maximum negative output.
This offset refers to the (V
V
offset errors do not allow accurate use of zero magnitude inputs; practical inputs are limited to 100 mV rms. The 1 span
is convenient reference point to define offset referred to input. For example, with this input span a value of R2 = 20 k
would give V
input scan and thus require a larger value of R2 to produce the +10 V output span. In this case, the offset is corresponding
magnified when referred to the output voltage. For example, a Schaevitz E100 LVDT requires 80.2 k
a 10.69 volt output and (V
may be determined by multiplying the maximum value shown in the data sheet ( 1 percent of FS by 1/0.27) which equals
when referred to the 10.69 V output, these data sheet values should also be multiplied by (1/0.27). The maximum values
of offset drift, PSRR offset, and CMRR offset would be:
referred to the 10.69 volt output.
3.7 percent values maximum. Similarly, to determine the maximum values of offset drift, offset CMRR and offset PSRR
S
B
= 15 V dc, C1 = 0.015 F, R2 = 80 k , R
must equal zero volts; and correspondingly for (V
DEFENSE SUPPLY CENTER COLUMBUS
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43216-5000
OUT
span a value of 10 volts. Caution, most LVDTs will typically exercise less of the (V
STANDARD
A
A
– V
TABLE I. Electrical performance characteristics – Continued.
– V
B
B
) / (V
) / (V
A
A
+ V
+ V
B
B
) input spanning a full-scale range of 1. For (V
) equals 0.27. The maximum offset value referred to the 10.69 volt output
L
= 2 k , unless otherwise specified.
A
– V
185 ppm/ C; 741 ppm/V and 741 ppm/V, respectively, when
B
) / (V
A
SIZE
+ V
A
B
) to equal –1, V
REVISION LEVEL
A
must equal zero volts. Note that
B
A
– V
B
) / (V
A
– V
for R2 to produce
A
SHEET
+V
B
5962-90671
) / (V
B
) to equal +1,
A
6
+V
B
)