MT88E43BS1 Zarlink, MT88E43BS1 Datasheet - Page 3

• Manufacturer Part Number: MT88E43BS1
• Description: Caller ID CMOS 3.58MHz 3.3V/5V 24-Pin SOIC Tube
• Manufacturer: Zarlink

Specifications of MT88E43BS1

• Package: 24SOIC
• Telecommunication Standards Supported: GR-30|SIN227|SIN242|SR-TSV-002476|TR-NWT-000030
• Fabrication Technology: CMOS
• Maximum Data Rate: 1212 Bd
• Typical Operating Supply Voltage: 3.3|5 V
• Typical Supply Current: 3 mA
• Minimum Operating Temperature: -40 °C
• Maximum Operating Temperature: 85 °C
• Operating Frequency: 3.58 MHz

The MT88E43 provides all the features and functions offered by Zarlink’s MT8841 (CNIC), including 1200 baud Bell
202 and CCITT V.23 FSK demodulation. The 3-wire serial data interface provided by CNIC has been enhanced to
operate in two modes. In the CNIC compatible mode data transfer is initiated by the device. A second mode allows
a microcontroller to extract 8-bit data words from the device. Furthermore, the MT88E43 offers Idle State Tone Alert
Signal and line reversal detection capability for BT’s CLIP, ring burst detection for the U.K.’s CCA’s CLIP, and ring
and CAS detection for Bellcore’s CID.
Functional Overview
The MT88E43, Extended Voltage Calling Number Identification Circuit 2 (ECNIC2) is a device compatible with BT,
the U.K.’s CCA and Bellcore specifications. As shown in Figure 1, the MT88E43 provides an FSK demodulator as
well as a 3-wire serial interface similar to that of it’s predecessor, the MT8841 (CNIC). The 3-wire interface has
been enhanced to provide two modes of operation - a mode whereby data transfer is initiated by the device and a
mode whereby data transfer is initiated by an external microcontroller.
In addition to supporting all the features and functions of the MT8841, the MT88E43 also provides line reversal
detection, ring detection and dual tone alert signal/CAS detection. These new functions eliminate some external
circuitry previously required with the MT8841.
The MT88E43 is compatible with the caller identity specifications of BT, the U.K.’s CCA, and Bellcore.
BT specifications SIN227 and SIN242 describe the signalling mechanism between the network and the Terminal
Equipment (TE) for the Caller Display Service (CDS). CDS provides Calling Line Identity Presentation (CLIP),
which delivers to an on hook (idle state) TE the identity of an incoming caller before the first ring.
An incoming CDS call is indicated by a polarity reversal on the A and B wires (see Figure 3), followed by an Idle
State Tone Alert Signal. Caller ID FSK information is then transmitted in CCITT V.23 format. MT88E43 can detect
the line reversal, tone alert signal, and demodulate the incoming CCITT V.23 FSK signals.
Pin Description
Pin #
17
18
19
20
21
22
23
24
Name
DATA
St/GT
INT
StD
V
ESt
DR
CD
DD
3-wire Interface: Data (CMOS Output). In mode 0 data appears at the pin once demodulated.
In mode 1 data is shifted out on the rising edge of the microcontroller supplied DCLK.
3-wire Interface: Data Ready (CMOS Output). Active low. In mode 0 this output goes low after
the last DCLK pulse of each data word. This identifies the 8-bit word boundary on the serial
output stream. Typically, DR is used to latch 8-bit words from a serial-to-parallel converter into a
microcontroller. In mode 1 this pin will signal the availability of data.
Carrier Detect (CMOS Output). Active low. A logic low indicates the presence of in-band signal
at the output of the FSK bandpass filter.
Interrupt (Open Drain Output). Active low. It is active when TRIGout or DR is low, or StD is
high. This output stays low until all three signals have become inactive.
Dual Tone Alert Signal Delayed Steering Output (CMOS Output). When high, it indicates
that a guard time qualified alert signal has been detected.
Dual Tone Alert Signal Early Steering Output (CMOS Output). Alert signal detection output.
Used in conjunction with St/GT and external circuitry to implement the detect and non-detect
guard times.
Dual Tone Alert Signal Steering Input/Guard Time (Analog Input/CMOS Output). A voltage
greater than V
has been detected by asserting StD high. A voltage less than V
new dual tone.
Positive Power Supply.
TGt
(see Figure 4) at the St/GT pin causes the device to indicate that a dual tone
Zarlink Semiconductor Inc.
MT88E43B
3
Description
TGt
frees the device to accept a
Data Sheet