821054PQF Integrated Device Technology (Idt), 821054PQF Datasheet - Page 16

• Manufacturer Part Number: 821054PQF
• Description: Audio Codec 4ADC / 4DAC 64-Pin PQFP
• Manufacturer: Integrated Device Technology (Idt)
• Type: PCMr

Specifications of 821054PQF

• Package: 64PQFP
• Number Of Channels: 4ADC /4 DAC
• Number Of Dacs: 4
• Operating Supply Voltage: 5 V

IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
the linear PCM data will be sent to the level meter and the metering
result will be output to GREG18 and GREG19. With this result, the
signal level can be calculated.
level can be calculated by the following formula:
by the following formula:
mode, the compressed PCM data will be output to GREG19
transparently without metering.
For A-law compressed PCM code or linear PCM code, the signal
For
LM
LM
If the L/C bit is ‘0’, it means that message mode is selected. In this
Refer to the Application Note for further details on the level meter.
A dbm0
A dbm0
(
(
Result
Countnumber
µ
-law compressed PCM code, the signal level can be calculated
:
)
)
=
=
20
20
:the count number of the level meter (set in GREG20).
the value in the level meter result registers (GREG18
& GREG19);
×
×
log
log






------------------------------------------------------------- -
LM
------------------------------------------------------------- -
LM
Countnumber
Countnumber
LM
LM
Result
Result
×
×
×
×
2
2
5
5
2
2
×
×
×
×
π
π
8192
8192






+
+
3.14
3.17
16
2.11
independently by setting the PD bit in LREG9 to ‘1’. If one channel is
powered down and enters the standby mode, the PCM data transfer and
the D/A, A/D converters of this channel will be disabled. In this way, the
power consumption of the device can be reduced.
powered down. All circuits that contain programmed information retain
their data after power down. The microprocessor interface is always
active so that new commands can be received and executed.
2.12
suspend mode saves much more power consumption than the standby
mode. In this mode, the PLL block is turned off and the DSP operation is
disabled. Only global and local commands can be executed, the RAM
operation is disabled as the internal clock has been turned off. The PLL
block is powered down by setting the PPD bit in GREG22 to ‘1’. Once
the PLL and all four channels are powered down, the IDT821054 will
enter the suspend mode.
Each individual channel of the IDT821054 can be powered down
When the IDT821054 is powered up or reset, all four channels will be
A suspend mode is provided for the whole chip to save power. The
CHANNEL POWER DOWN/STANDBY MODE
POWER DOWN/SUSPEND MODE
INDUSTRIAL TEMPERATURE RANGE