LE87213AFQC Zarlink, LE87213AFQC Datasheet - Page 3

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LE87213AFQC

Manufacturer Part Number
LE87213AFQC
Description
World Wide xDSL Line Driver 32-Pin QFN EP Tray
Manufacturer
Zarlink
Datasheet

Specifications of LE87213AFQC

Package
32QFN EP
Transmission Media Type
Cable
Power Supply Type
Analog
Typical Operating Supply Voltage
3.3 V

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PRODUCT DESCRIPTION
The Le87213A device is a low-power, dual xDSL differential line driver. It is part of Zarlink’s family of integrated line drivers
capable of operating from a standard negative battery supply. Its integration of feedback components and on-chip surge
protection diodes makes it one of the most integrated line drivers on the market today.
The Le87213A device was designed on a high voltage, high bandwidth bipolar process in which fast slew rate and low distortion
amplifiers were implemented. It requires one line transformer per line for isolation and for compliance with IEC60950-1, 2001 and
UL60950 standards. The line driver amplifiers in the Le87213A device were designed with an optimized bandwidth for xDSL
applications as well as for fast slew rates of 300 V/µs.
Lightning and Power Surges
The Le87213A device has built-in lightning and power surge protection. When used with the components listed in the
on page
Block Description
Refer to the datapath provider for the application circuit.
Downstream Path
The downstream signal is applied at the DDWNP/DDWNN pins, and is amplified by a fixed voltage gain (K
applied to the AY and BY pins. The amplifiers driving the AY and BY pins are DC biased to approximately one-half of the VBAT
pin voltage. The typical differential output voltage swing between AY and BY pins is |VBAT| - 4 V. This allows the use of a step-
down transformer for the line interface.
Control Logic
This block controls the bias currents of the input stage and the bias current of the output amplifiers as described in the
Operating Modes
DEVICE OPERATING MODES
The two lines of the Le87213A are completely independent and can be programmed to be in different operating modes. The logic
signal level of pins DISCON1 an Pdown1 controls the operating mode of line 1, the logic signal level of pins DISCON2 and
Pdown2 controls the operating mode of line 2.
Active Mode
In this mode, all stages are biased and operational.
PDown Mode
In this mode, the line driver amplifier’s power consumption is reduced. The Bias current in the output stage drops to almost half
full power stage. The part is ADSL compliant in this stage.
Disconnect Mode
In this mode, the bias is turned OFF to all stages to save power. The device is not operational.
Operating Mode Control Decoding
8, it needs no other external protector to meet the requirements for ADSL line Cards.
DISCON
DISCON
0
0
1
0
0
1
section below.
1
2
Pdown
Pdown
0
1
0
1
x
x
1
2
Zarlink Semiconductor Inc.
3
Line 1 Operating Mode
Line 2 Operating Mode
Disabled
Disabled
Pdown
Pdown
Active
Active
DWN
) before being
PCB Layout,
Device

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