HSMP-3814-TR2G Avago Technologies US Inc., HSMP-3814-TR2G Datasheet - Page 4

• Manufacturer Part Number: HSMP-3814-TR2G
• Description: DIODE PIN ATTENUATOR CC SOT-23
• Manufacturer: Avago Technologies US Inc.

Specifications of HSMP-3814-TR2G

• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Diode Type: PIN - 1 Pair Common Cathode
• Voltage - Peak Reverse (max): 100V
• Current - Max: 1A
• Capacitance @ Vr, F: 0.35pF @ 50V, 1MHz
• Resistance @ If, F: 3 Ohm @ 100mA, 100MHz
• Configuration: Common Anode
• Reverse Voltage: 50 V
• Forward Continuous Current: 1 A
• Termination Style: SMD/SMT
• Carrier Life: 1.5 us
• Maximum Diode Capacitance: 0.35 pF at 50 V
• Maximum Operating Temperature: + 150 C
• Maximum Series Resistance @ Maximum If: 3 Ohms at 100 mA
• Maximum Series Resistance @ Minimum If: 53 Ohms at 1 mA
• Minimum Operating Temperature: - 65 C
• Mounting Style: SMD/SMT
• Recovery Time: 300 ns
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Typical Applications for HSMP-481x Low Inductance Series
Microstrip Series Connection for HSMP-481x Series
In order to take full advantage of the low inductance of the
HSMP-481x series when using them in series applications,
both lead 1 and lead 2 should be connected together, as
shown in Figure 7.
Figure 6. Internal Connections.
Microstrip Shunt Connections for HSMP-481x Series
In Figure 8, the center conductor of the microstrip
line is interrupted and leads 1 and 2 of the HSMP-481x
series diode are placed across the resulting gap. This forces
the 1.5 nH lead inductance of leads 1 and 2 to appear as
part of a low pass filter, reducing the shunt
parasitic inductance and increasing the maximum available
attenuation. The 0.3 nHof shunt inductance external to the
diode is created by the via holes, and is a good estimate
for 0.032" thick material.
Figure 8. Circuit Layout.
4
50 OHM MICROSTRIP LINES
1
HSMP-481x
PAD CONNECTED TO
3
GROUND BY TWO
VIA HOLES
2
Figure 7. Circuit Layout.
Figure 9. Equivalent Circuit.
R
j
1.5 nH
0.08
I
b
0.9
R
+ 2.5
j
0.3 nH
0.3 nH
0.3 pF
1.5 nH