QS3VH384PAG8 Integrated Device Technology (Idt), QS3VH384PAG8 Datasheet - Page 7

• Manufacturer Part Number: QS3VH384PAG8
• Description: Bus Switch 2-Element 5-IN 24-Pin TSSOP T/R
• Manufacturer: Integrated Device Technology (Idt)

Specifications of QS3VH384PAG8

• Package: 24TSSOP
• Configuration: 5 x 1:1
• Logic Function: Bus Switch
• Number Of Elements Per Chip: 2
• Number Of Outputs Per Chip: 10
• Typical Operating Supply Voltage: 2.5|3.3 V
• Maximum On Resistance: 7(Typ) Ohm
• Maximum Low Level Output Current: 120 mA
• Maximum Operating Supply Voltage: 3.6 V
• Minimum Operating Supply Voltage: 2.3 V
• Maximum Propagation Delay Time @ Maximum Cl: 0.2@3.3V ns

TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
DEFINITIONS:
C
R
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; t
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; t
SWITCH POSITION
IDTQS3VH384
2.5V / 3.3V 10-BIT HIGH BANDWIDTH BUS SWITCH
Pulse
Generator
L
T
= Termination resistance: should be equal to Z
= Load capacitance: includes jig and probe capacitance.
Symbol
V
V
V
LOAD
V
(1, 2)
V
C
HZ
LZ
IH
T
L
t
t
PHZ/
PLZ
Test
t
PD
/
V
t
t
PZH
PZL
V
IN
CC
Test Circuits for All Outputs
(1)
= 3.3V ± 0.3V
300
300
1.5
50
6
3
R
T
D.U.T.
V
CC
V
OUT
V
OUT
CC
F
F
≤ 2ns; t
(2)
≤ 2.5ns; t
of the Pulse Generator.
= 2.5V ± 0.2V
2 x Vcc
C
V
Vcc
150
150
L
CC
30
Switch
V
/2
R
GND
Open
LOAD
R
≤ 2ns.
500Ω
500Ω
≤ 2.5ns.
Unit
mV
mV
pF
V
Open
GND
V
V
V
LOAD
7
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
INPUT TRANSITION
INPUT TRANSITION
OPPOSITE PHASE
NORMALLY
NORMALLY
CONTROL
OUTPUT
OUTPUT
SAME PHASE
INPUT
HIGH
LOW
OUTPUT
Enable and Disable Times
CLOSED
SWITCH
SWITCH
ENABLE
OPEN
Propagation Delay
t
t
PZH
PZL
INDUSTRIAL TEMPERATURE RANGE
t
t
PLH
PLH
V
0V
V
V
T
T
LOAD/2
t
PHZ
DISABLE
t
t
PHL
PHL
t
PLZ
V
V
0V
V
V
V
V
V
0V
V
V
0V
V
V
V
V
V
0V
IH
T
LOAD/2
OL +
OL
OH
OH -
IH
T
OH
T
OL
IH
T
V
V
HZ
LZ