74FCT3244APGG8 Integrated Device Technology (Idt), 74FCT3244APGG8 Datasheet - Page 5

• Manufacturer Part Number: 74FCT3244APGG8
• Description: Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin TSSOP T/R
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 74FCT3244APGG8

• Package: 20TSSOP
• Logic Family: FCT
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 8
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 4.8@3.3V ns
• Typical Quiescent Current: 2 uA
• Polarity: Non-Inverting

TEST CIRCUITS AND WAVEFORMS
ASYNCHRONOUS CONTROL
SYNCHRONOUS CONTROL
IDT74FCT3244/A
3.3V CMOS OCTAL BUFFER/LINE DRIVER
Generator
INPUT TRANSITION
INPUT TRANSITION
Pulse
OPPOSITE PHASE
CLOCK ENABLE
SAME PHASE
PRESET
PRESET
TIMING
V
CLEAR
CLEAR
OUTPUT
INPUT
IN
DATA
INPUT
ETC.
ETC.
Set-Up, Hold, and Release Times
Test Circuits for All Outputs
R
T
Propagation Delay
D.U.T.
V
t
PLH
t
CC
PLH
t
t
SU
SU
V
OUT
t
REM
t
C
t
t
50pF
H
PHL
PHL
L
t
H
500Ω
500Ω
3V
1.5V
0V
V
1.5V
V
3V
1.5V
0V
OH
OL
Open
GND
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
6v
5
SWITCH POSITION
DEFINITIONS:
C
R
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; Z
3. If Vcc is below 3V, input voltage swings should be adjusted not to exceed Vcc.
L
T
NORMALLY
NORMALLY
= Load capacitance: includes jig and probe capacitance.
= Termination resistance: should be equal to Z
CONTROL
HIGH-LOW-HIGH
LOW-HIGH-LOW
OUTPUT
OUTPUT
INPUT
HIGH
LOW
All Other Tests
Disable High
Disable Low
Enable High
Enable Low
Open Drain
Test
PULSE
PULSE
SWITCH
SWITCH
GND
ENABLE
6V
t
t
Enable and Disable Times
PZH
PZL
Pulse Width
INDUSTRIAL TEMPERATURE RANGE
1.5V
1.5V
3V
0V
t
PHZ
OUT
t
W
DISABLE
O
of the Pulse Generator.
≤ 50Ω; t
t
PLZ
Switch
GND
Open
6V
F
0.3V
0.3V
≤ 2.5ns; t
3V
1.5V
0V
3V
V
V
0V
OL
OH
R
1.5V
1.5V
≤ 2.5ns.