83940AY-02LF Integrated Device Technology (Idt), 83940AY-02LF Datasheet - Page 8
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83940AY-02LF
Manufacturer Part Number
83940AY-02LF
Description
Clock Driver 2-IN LVCMOS/LVTTL 32-Pin LQFP Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.ICS83940AY-02LFT.pdf
(15 pages)
Specifications of 83940AY-02LF
Package
32LQFP
Configuration
1 x 2:1
Input Signal Type
HCSL/LVCMOS/LVDS/LVHSTL/LVPECL/LVTTL/SSTL
Maximum Output Frequency
200 MHz
Operating Supply Voltage
2.5|3.3 V
W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
83940AY-02
IRING THE
D
IFFERENTIAL
I
F
NPUT TO
IGURE
Single Ended Clock Input
1. S
A
A
PPLICATION
CCEPT
INGLE
E
C1
0.1u
D
S
NDED
V_REF
INGLE
IFFERENTIAL
CC
www.idt.com
/2 is
S
IGNAL
E
8
I
NDED
NFORMATION
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
D
1K
R1
1K
R2
RIVING
VDD
L
-
TO
EVELS
CLK
nCLK
D
-LVCMOS/LVTTL F
IFFERENTIAL
I
NPUT
CC
= 3.3V, V_REF should be 1.25V
L
ICS83940-02
OW
S
ANOUT
KEW
REV. A AUGUST 4, 2010
, 1-
B
TO
UFFER
-18