HEF4040BPN NXP Semiconductors, HEF4040BPN Datasheet - Page 2

• Manufacturer Part Number: HEF4040BPN
• Description: Counter/Divider Single 12-Bit Binary UP 16-Pin PDIP Bulk
• Manufacturer: NXP Semiconductors
• Type: Binaryr

Specifications of HEF4040BPN

• Logic Family: HEF4000
• Package: 16PDIP
• Logic Function: Counter/Divider
• Operation Mode: UP Counter
• Direction Type: Uni-Directional
• Number Of Elements Per Chip: 1
• Typical Operating Supply Voltage: 3.3|5|9|12 V
• Operating Temperature: -40 to 85 °C
• Counter Type: Binary Counters
• Counting Method: Asynchronous
• Counting Sequence: Down
• Operating Supply Voltage: 4.5 V to 15.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: Through Hole
• Package / Case: DIP-16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: HEF4040BP,652

Philips Semiconductors
DESCRIPTION
The HEF4040B is a 12-stage binary ripple counter with a
clock input (CP), an overriding asynchronous master reset
input (MR) and twelve fully buffered outputs (O
The counter advances on the HIGH to LOW transition of
CP. A HIGH on MR clears all counter stages and forces all
outputs LOW, independent of CP. Each counter stage is a
static toggle flip-flop. Schmitt-trigger action in the clock
input makes the circuit highly tolerant to slower clock rise
and fall times.
January 1995
HEF4040BP(N):
HEF4040BD(F):
HEF4040BT(D):
( ): Package Designator North America
12-stage binary counter
Fig.2 Pinning diagram.
16-lead DIL; plastic
16-lead DIL; ceramic (cerdip)
16-lead SO; plastic
(SOT38-1)
(SOT74)
(SOT109-1)
Fig.1 Functional diagram.
0
to O
11
).
2
PINNING
APPLICATION INFORMATION
Some examples of applications for the HEF4040B are:
FAMILY DATA, I
See Family Specifications
CP
MR
O
Frequency dividing circuits
Time delay circuits
Control counters
0
to O
11
clock input (HIGH to LOW edge-triggered)
master reset input (active HIGH)
parallel outputs
DD
LIMITS category MSI
Product specification
HEF4040B
MSI