XC95108-10TQ100C Xilinx Inc, XC95108-10TQ100C Datasheet - Page 3
![CPLD XC9500 Family 2.4K Gates 108 Macro Cells 66.7MHz 0.5um (CMOS) Technology 5V 100-Pin TQFP](/photos/6/70/67082/100-tqfp_sml.jpg)
XC95108-10TQ100C
Manufacturer Part Number
XC95108-10TQ100C
Description
CPLD XC9500 Family 2.4K Gates 108 Macro Cells 66.7MHz 0.5um (CMOS) Technology 5V 100-Pin TQFP
Manufacturer
Xilinx Inc
Series
XC9500r
Datasheets
1.XC9572XL-10TQG100C.pdf
(1 pages)
2.XC9536-15PCG44C.pdf
(17 pages)
3.XC95108-15TQG100C.pdf
(10 pages)
Specifications of XC95108-10TQ100C
Package
100TQFP
Family Name
XC9500
Device System Gates
2400
Number Of Macro Cells
108
Maximum Propagation Delay Time
10 ns
Number Of User I/os
81
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
66.7 MHz
Number Of Product Terms Per Macro
90
Memory Type
Flash
Operating Temperature
0 to 70 °C
Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number Of Logic Elements/blocks
6
Number Of Macrocells
108
Number Of Gates
2400
Number Of I /o
81
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
5V
Case
TQFP100
Dc
99+
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1390
XC95108-10TQ100C
XC95108-10TQ100C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC95108-10TQ100C
Manufacturer:
XILINX
Quantity:
10
associated output enable signals drive directly to the IOBs.
See
Function Block
Each Function Block, as shown in
18 independent macrocells, each capable of implementing
a combinatorial or registered function. The FB also receives
global clock, output enable, and set/reset signals. The FB
generates 18 outputs that drive the Fast CONNECT switch
matrix. These 18 outputs and their corresponding output
enable signals also drive the IOB.
Logic within the FB is implemented using a sum-of-products
representation. Thirty-six inputs provide 72 true and com-
plement signals into the programmable AND-array to form
DS063 (v5.5) June 25, 2007
Product Specification
Figure
JTAG Port
1.
I/O/GCK
I/O/GSR
I/O/GTS
R
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Note: Function block outputs (indicated by the bold lines) drive the I/O blocks directly.
2 or 4
3
1
Figure
3
2, is comprised of
Controller
Figure 1: XC9500 Architecture
Blocks
JTAG
I/O
www.xilinx.com
90 product terms. Any number of these product terms, up to
the 90 available, can be allocated to each macrocell by the
product term allocator.
Each FB (except for the XC9536) supports local feedback
paths that allow any number of FB outputs to drive into its
own programmable AND-array without going outside the
FB. These paths are used for creating very fast counters
and state machines where all state registers are within the
same FB.
XC9500 In-System Programmable CPLD Family
In-System Programming Controller
18
18
18
18
36
36
36
36
Macrocells
Macrocells
Macrocells
Macrocells
Function
Function
Function
Function
DS063_01_110501
Block N
Block 1
Block 2
Block 3
1 to 18
1 to 18
1 to 18
1 to 18
3