XC95108-15PCG84I Xilinx Inc, XC95108-15PCG84I Datasheet - Page 10

• Manufacturer Part Number: XC95108-15PCG84I
• Description: CPLD XC9500 Family 2.4K Gates 108 Macro Cells 55.6MHz 0.5um (CMOS) Technology 5V 84-Pin PLCC
• Manufacturer: Xilinx Inc

Specifications of XC95108-15PCG84I

• Package: 84PLCC
• Family Name: XC9500
• Device System Gates: 2400
• Number Of Macro Cells: 108
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 69
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 55.6 MHz
• Number Of Product Terms Per Macro: 90
• Memory Type: Flash
• Operating Temperature: -40 to 85 °C

XC95108 In-System Programmable CPLD
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Additional Information
XC9500 Data Sheets and Application Notes
Device Packaging
Revision History
The following table shows the revision history for this document.
10
12/04/98
06/18/03
08/21/03
03/01/04
04/15/05
04/03/06
Date
Version
3.0
4.0
4.1
4.2
4.3
4.4
Update AC characteristics and internal parameters.
Updated format.
Updated Package Device Marking Pin 1 orientation.
Updated table on page 8 for PQ160 pins.
Added asynchronous preset/reset pulse width specification (T
Added Warranty Disclaimer. Added Pb-Free package ordering information.
www.xilinx.com
Online Store
Revision
APRPW
DS066 (v4.4) April 3, 2006
).
Product Specification
R