XC2S150E-6PQG208C Xilinx Inc, XC2S150E-6PQG208C Datasheet - Page 44

• Manufacturer Part Number: XC2S150E-6PQG208C
• Description: FPGA Spartan®-IIE Family 150K Gates 3888 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP
• Manufacturer: Xilinx Inc

Specifications of XC2S150E-6PQG208C

• Package: 208PQFP
• Family Name: Spartan®-IIE
• Device Logic Cells: 3888
• Device Logic Units: 864
• Device System Gates: 150000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 146
• Ram Bits: 49152

Spartan-IIE FPGA Family: DC and Switching Characteristics
44
Output Jitter: the difference between an ideal
reference clock edge and the actual design.
Period Tolerance: the allowed input clock period change in nanoseconds.
Ideal Period
Actual Period
T
CLKIN
=
F CLKIN
1
Figure 22: Period Tolerance and Clock Jitter
www.xilinx.com
T CLKIN + T IPTOL
Phase Offset and Maximum Phase Difference
_
+/- Jitter
+ Maximum
+ Phase Offset
Phase Difference
DS077-3 (v2.3) June 18, 2008
Product Specification
DS001_52_090800
R