XC2S50E-6TQ144I Xilinx Inc, XC2S50E-6TQ144I Datasheet - Page 31

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XC2S50E-6TQ144I

Manufacturer Part Number
XC2S50E-6TQ144I
Description
FPGA Spartan®-IIE Family 50K Gates 1728 Cells 357MHz 0.15um Technology 1.8V 144-Pin TQFP
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC2S50E-6TQ144I

Package
144TQFP
Family Name
Spartan®-IIE
Device Logic Cells
1728
Device Logic Units
384
Device System Gates
50000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
102
Ram Bits
32768

Available stocks

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Manufacturer
Quantity
Price
Part Number:
XC2S50E-6TQ144I
Manufacturer:
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Quantity:
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Part Number:
XC2S50E-6TQ144I
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0
DS077-3 (v2.3) June 18, 2008
Definition of Terms
In this document, some specifications may be designated as Advance or Preliminary. These designations are based on the
more detailed timing information used by the development system and reported in the output files. These terms are defined
as follows:
Advance: Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or families. Values
are subject to change. Use as estimates, not for production.
Preliminary: Based on characterization. Further changes are not expected.
Except for pin-to-pin input and output parameters, the AC parameter delay specifications included in this document are
derived from measuring internal test patterns. All specifications are representative of worst-case supply voltage and junction
temperature conditions. The parameters included are common to popular designs and typical applications. All specifications
are subject to change without notice.
DC Specifications
Absolute Maximum Ratings
© 2003-2007 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
trademarks are the property of their respective owners.
DS077-3 (v2.3) June 18, 2008
Product Specification
Notes:
1.
2.
3.
4.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
V
Maximum DC overshoot must be limited to either V
whichever is easier to achieve. The Maximum AC conditions are as follows: The device pins may undershoot to –2.0V or overshoot
to V
For soldering guidelines, see the Packaging Information on the Xilinx
IN
Symbol
V
V
V
T
should not exceed V
CCINT
CCO
V
V
CCO
STG
T
REF
TS
IN
J
+ 2.0V, provided this over/undershoot lasts no more than 11 ns with a forcing current no greater than 100 mA.
Supply voltage relative to GND
Supply voltage relative to GND
Input reference voltage
Input voltage relative to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Junction temperature
CCO
R
by more than 3.6V over extended periods of time (e.g., longer than a day).
(1)
Description
CCO
(2,3)
(3)
www.xilinx.com
+ 0.5V or 10 mA, and undershoot must be limited to –0.5V or 10 mA,
0
Spartan-IIE FPGA Family:
DC and Switching Characteristics
Product Specification
®
website.
–0.5
–0.5
–0.5
–0.5
–0.5
Min
–65
-
+150
+125
Max
2.0
4.0
4.0
4.0
4.0
Units
°C
°C
V
V
V
V
V
31

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