XC3S200AN-5FTG256C Xilinx Inc, XC3S200AN-5FTG256C Datasheet - Page 6

• Manufacturer Part Number: XC3S200AN-5FTG256C
• Description: 200000 SYSTEM GATE 1.2 VOLT FPGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S200AN-5FTG256C

• Number Of Logic Elements/cells: 4032
• Number Of Labs/clbs: 448
• Total Ram Bits: 294912
• Number Of I /o: 195
• Number Of Gates: 200000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1599; XC3S200AN-5FTG256C

Package Marking
Figure 3
FPGAs in the quad-flat packages.
marking for Spartan-3AN FPGAs in BGA packages. The
markings for the BGA packages are nearly identical to those
for the quad-flat packages, except that the marking is
rotated with respect to the ball A1 indicator.
X-Ref Target - Figure 3
X-Ref Target - Figure 4
DS557 (v4.1) April 1, 2011
Product Specification
provides a top marking example for Spartan-3AN
Temperature Range
Temperature Range
Figure 4: Spartan-3AN FPGA BGA Package Marking Example
Figure 3: Spartan-3AN FPGA QFP Package Marking Example
Speed Grade
Device Type
Speed Grade
Device Type
Figure 4
BGA Ball A1
Package
Package
Pin P1
shows the top
Spartan-3AN FPGA Family: Introduction and Ordering Information
SPARTAN
SPARTAN
XC3S200AN
FTG256 AGQ0725
D1234567A
4C
XC3S50AN
TQG144 AGQ0725
D1234567A
4C
www.xilinx.com
R
R
TM
The “5C” and “4I” Speed Grade/Temperature Range part
combinations may be dual marked as “5C/4I”. Devices
with the dual mark can be used as either -5C or -4I devices.
Devices with a single mark are only guaranteed for the
marked speed grade and temperature range.
R
R
TM
Lot Code
Mask Revision Code
Fabrication Code
Process Code
Date Code
Mask Revision Code
Fabrication Code
Process Technology
Date Code
Lot Code
DS557-1_03_080107
DS557-1_02_080107
6