XC3S250E-4PQG208I Xilinx Inc, XC3S250E-4PQG208I Datasheet - Page 123

FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP

XC3S250E-4PQG208I

Manufacturer Part Number
XC3S250E-4PQG208I
Description
FPGA Spartan®-3E Family 250K Gates 5508 Cells 572MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S250E-4PQG208I

Package
208PQFP
Family Name
Spartan®-3E
Device Logic Cells
5508
Device Logic Units
612
Device System Gates
250000
Number Of Registers
4896
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
158
Ram Bits
221184
Number Of Logic Elements/cells
5508
Number Of Labs/clbs
612
Total Ram Bits
221184
Number Of I /o
158
Number Of Gates
250000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Table 81: DC Characteristics of User I/Os Using
Single-Ended Standards
DS312-3 (v3.8) August 26, 2009
Product Specification
LVTTL
LVCMOS33
LVCMOS25
IOSTANDARD
Attribute
(3)
(3)
(3)
R
12
16
12
16
12
2
4
6
8
2
4
6
8
2
4
6
8
Conditions
(mA)
I
12
16
12
16
12
OL
2
4
6
8
2
4
6
8
2
4
6
8
Test
(mA)
–12
–16
–12
–16
–12
I
–2
–4
–6
–8
–2
–4
–6
–8
–2
–4
–6
–8
OH
Max (V)
V
0.4
0.4
0.4
Characteristics
OL
Logic Level
V
V
CCO
CCO
Min (V)
V
2.4
OH
www.xilinx.com
0.4
0.4
Table 81: DC Characteristics of User I/Os Using
Single-Ended Standards (Continued)
Notes:
1.
2.
3.
4.
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
PCI66_3
HSTL_I_18
HSTL_III_18
SSTL18_I
SSTL2_I
IOSTANDARD
The numbers in this table are based on the conditions set forth in
Table 77
Descriptions of the symbols used in this table are as follows:
For the LVCMOS and LVTTL standards: the same V
limits apply for both the Fast and Slow slew attributes.
Tested according to the relevant PCI specifications. For
information on PCI IP solutions, see www.xilinx.com/pci. The
PCIX IOSTANDARD is available and has equivalent
characteristics but no PCI-X IP is supported.
I
I
V
V
V
V
OL
OH
OL
OH
Attribute
CCO
TT
(4)
(4)
the output current condition under which V
the output current condition under which V
the voltage applied to a resistor termination
the output voltage that indicates a Low logic level
the output voltage that indicates a High logic level
(3)
(3)
(3)
the supply voltage for output drivers
and
Table
2
4
6
8
2
4
6
2
80.
Conditions
(mA)
I
1.5
1.5
6.7
8.1
24
DC and Switching Characteristics
OL
2
4
6
8
2
4
6
2
8
Test
(mA)
–0.5
–0.5
–6.7
–8.1
I
–2
–4
–6
–8
–2
–4
–6
–2
–8
–8
OH
10% V
10% V
V
V
Max (V)
TT
TT
V
0.4
0.4
0.4
0.4
0.4
– 0.475
Characteristics
– 0.61
OL
Logic Level
CCO
CCO
OL
OH
is tested
is tested
V
V
V
90% V
90% V
V
V
V
V
OL
CCO
CCO
CCO
CCO
CCO
TT
TT
Min (V)
V
and V
+ 0.475
+ 0.61
OH
- 0.4
- 0.4
- 0.4
CCO
CCO
0.4
0.4
123
OH

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