MAX2831ETM+ Maxim Integrated Products, MAX2831ETM+ Datasheet - Page 27

• Manufacturer Part Number: MAX2831ETM+
• Description: RF Transceiver 2.4GHz to 2.5GHz, 80 2.11g RF Transceiver
• Manufacturer: Maxim Integrated Products

Specifications of MAX2831ETM+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MICROWIRE is a trademark of National Semiconductor Corp.
The MAX2831/MAX2832 include 16 programmable, 18-
bit registers. The 14 most significant bits (MSBs) are
used for register data. The 4 least significant bits
(LSBs) of each register contain the register address.
See Table 14 for a summary of the registers and rec-
ommended register settings.
Register data is loaded through the 3-wire SPI/
MICROWIRE™-compatible serial interface. Data is
Table 14. Recommended Register Settings*
*The power-on register settings are not production tested. Recommended register settings must be loaded after V
Figure 2. 3-Wire SPI Serial-Interface Timing Diagram
REGISTER
SCLK
DIN
CS
10
11
12
13
14
15
0
1
2
3
4
5
6
7
9
8
t
CSO
D13
Programmable Registers and
0
0
0
0
1
0
0
0
1
0
0
0
0
0
0
0
______________________________________________________________________________________
t
CSS
D12
1
1
1
0
1
0
0
1
0
0
1
0
0
0
0
0
BIT 1
D11
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
3-Wire SPI-Interface
RF Transceivers with Integrated PA
t
BIT 2
DS
D10
1
0
0
0
1
0
0
0
0
0
1
0
0
1
0
0
D9
1
0
0
0
1
0
0
0
0
1
0
0
0
1
1
0
D8
1
1
0
0
0
0
0
0
0
1
1
0
1
0
1
1
2.4GHz to 2.5GHz 802.11g/b
D7
0
1
0
0
0
1
0
0
0
1
1
0
0
1
0
0
DATA
BIT 15
t
DH
D6
1
0
0
1
1
0
1
0
0
0
0
1
1
0
0
1
shifted in MSB first and is framed by CS. When CS is
low, the clock is active, and data is shifted with the ris-
ing edge of the clock. When CS transitions high, the
shift register is latched into the register selected by the
contents of the address bits. See Figure 2. Only the last
18 bits shifted into the device are retained in the shift
register. No check is made on the number of clock
pulses. For programming data words less than 14 bits
long, only the required data bits and the address bits
need to be shifted, resulting in faster Rx and Tx gain
control where only the LSBs need to be programmed.
BIT 16
D5
0
0
0
1
1
1
1
1
1
1
1
1
0
0
1
0
t
CL
D4
0
1
0
1
0
0
0
0
0
1
0
1
0
1
1
0
D3
0
1
0
1
0
0
0
0
0
0
0
1
0
0
1
0
BIT 23
D2
0
0
0
0
1
1
0
0
0
1
1
1
0
0
0
1
t
CH
D1
0
1
1
0
1
0
0
1
0
0
0
1
0
1
1
0
BIT 24
t
CSH
D0
0
0
1
1
0
0
0
0
1
1
0
1
0
0
1
1
t
CSW
ADDRESS
(A3:A0)
CC
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
is supplied.
TABLE
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
27