ATA5812-PLQW80 Atmel, ATA5812-PLQW80 Datasheet - Page 42
![RF Transceiver RF Data Control Transceiver](/photos/30/99/309912/qfn-48_sml.jpg)
ATA5812-PLQW80
Manufacturer Part Number
ATA5812-PLQW80
Description
RF Transceiver RF Data Control Transceiver
Manufacturer
Atmel
Datasheet
1.ATA5811-PLHC.pdf
(92 pages)
Specifications of ATA5812-PLQW80
Wireless Frequency
226 KHz
Interface Type
4-Wire SPI
Noise Figure
7 dB
Output Power
10 dBm
Operating Supply Voltage
2.4 V to 5.25 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-48
Maximum Data Rate
20 Kbps
Minimum Operating Temperature
- 40 C
Modulation
ASK, FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ATA5811/ATA5812
If the transceiver is in any active mode (Idle, AUX, TX, RX, RX_Polling), an integrated debounce
logic is active. If there is an event on pin Tn a debounce counter is set to 0 (T = 0) and started.
The status is updated, an interrupt is issued and the debounce counter is stopped after reaching
the counter value T = 8195
An event on the same key input before reaching T = 8195
An event on an other key input before reaching T = 8195
debounce counter.
While the debounce counter is running, the bits VSOUT_EN and CLK_ON in control register 3
are set to 1.
The interrupt is deleted after reading the status register or executes the command Delete_IRQ.
If a pin Tn is not used, it can be left open because of an internal pull-up resistor (typically 50 k ).
Figure 9-3.
Timing Flow Pin Tn, Status Bit STn
Start debounce counter
Stop debounce counter
RX Polling Mode or
Event on Pin Tn ?
Event on Pin Tn ?
IDLE Mode or
AUX Mode or
TX Mode or
Tn = STn ?
RX Mode
T = 0
Y
Y
Y
T
DCLK
N
N
N
.
Stop debounce counter
T = 8195
Pin Tn = 0 ?
STn = 1
IRQ = 1
Y
Y
T ?
N
N
T
DCLK
Stop debounce counter
T
DCLK
stops the debounce counter.
STn = 0
IRQ = 1
resets and restarts the
4689F–RKE–08/06
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