MAX2022ETX Maxim Integrated Products, MAX2022ETX Datasheet - Page 12

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MAX2022ETX

Manufacturer Part Number
MAX2022ETX
Description
Modulator / Demodulator High-Dynamic-Range D irect Upconversion 1
Manufacturer
Maxim Integrated Products
Datasheet

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with an ACLR typically greater than 77dB under these
conditions. The output power will be approximately
-18dBm per carrier, with a noise floor typically less
than -144dBc/Hz.
The MAX5895 DAC has built-in gain and offset fine
adjustments. These are programmable by a 3-wire seri-
al logic interface. The gain adjustment can be used to
adjust the relative gains of the I and Q DAC outputs.
This feature can be used to improve the native side-
band suppression of the MAX2022 quadrature modula-
tor. The gain adjustment resolution of 0.01dB allows
sideband nulling down to approximately -60dB. The off-
set adjustment can similarly be used to adjust the offset
DC output of each I and Q DAC. These offsets can then
be used to improve the native LO leakage of the
MAX2022. The DAC resolution of 4 LSBs will yield
nulled LO leakage of typically less than -50dBc relative
to four-carrier output levels.
The DAC outputs must be filtered by baseband filters to
remove the image frequency signal components. The
baseband signals for four-carrier operation cover DC to
10MHz. The image frequency appears at 481MHz to
491MHz. This very large frequency spread allows the
use of very low-complexity lowpass filters, with excel-
lent in-band gain and phase performance. The low
DAC noise floor allows for the use of a very wideband
filter, since the filter is not necessary to meet the 3GPP
noise floor specification.
The MAX2022 quadrature modulator then upconverts the
baseband signals to the RF output frequency. The output
power of the MAX2022 will be approximately
-28dBm per carrier. The noise floor will be less than
-169dBm/Hz, with an ACLR typically greater than 65dBc.
This performance meets the 3GPP specification require-
ments with substantial margins. The noise floor perfor-
mance will be maintained for large offset frequencies,
eliminating the need for subsequent RF filtering in the
transmitter lineup.
The RF output from the MAX2022 is then amplified by a
combination of a low-noise amplifier followed by a
MAX2057 RF-VGA. This VGA can be used for lineup
compensation for gain variance of transmitter and
power amplifier elements. No significant degradation of
the signal or noise levels will be incurred by this addi-
tional amplification. The MAX2057 will deliver an output
High-Dynamic-Range, Direct Upconversion
1500MHz to 2500MHz Quadrature Modulator
12
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power of -6dBm per carrier, 0dBm total at an ACLR of
65dB and noise floor of -142dBc/Hz.
A properly designed PC board is an essential part of
any RF/microwave circuit. Keep RF signal lines as short
as possible to reduce losses, radiation, and induc-
tance. For the best performance, route the ground pin
traces directly to the exposed pad under the package.
The PC board exposed paddle MUST be connected to
the ground plane of the PC board. It is suggested that
multiple vias be used to connect this pad to the lower-
level ground planes. This method provides a good
RF/thermal conduction path for the device. Solder the
exposed pad on the bottom of the device package to
the PC board. The MAX2022 evaluation kit can be used
as a reference for board layout. Gerber files are avail-
able upon request at www.maxim-ic.com.
Proper voltage-supply bypassing is essential for high-
frequency circuit stability. Bypass all V
22pF and 0.1µF capacitors placed as close to the pins
as possible. The smallest capacitor should be placed
closest to the device.
To achieve optimum performance, use good voltage-
supply layout techniques. The MAX2022 has several RF
processing stages that use the various V
while they have on-chip decoupling, off-chip interaction
between them may degrade gain, linearity, carrier sup-
pression, and output power-control range. Excessive
coupling between stages may degrade stability.
The EP of the MAX2022’s 36-pin thin QFN-EP package
provides a low thermal-resistance path to the die. It is
important that the PC board on which the IC is mounted
be designed to conduct heat from this contact. In addi-
tion, the EP provides a low-inductance RF ground path
for the device.
The exposed paddle (EP) MUST be soldered to a
ground plane on the PC board either directly or through
an array of plated via holes. An array of 9 vias, in a 3 x
3 array, is suggested. Soldering the pad to ground is
critical for efficient heat transfer. Use a solid ground
plane wherever possible.
Exposed Pad RF/Thermal Considerations
Power-Supply Bypassing
Layout Considerations
CC
CC
pins, and
pins with

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