MC44CC373CAEFR2 Freescale Semiconductor, MC44CC373CAEFR2 Datasheet - Page 5

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MC44CC373CAEFR2

Manufacturer Part Number
MC44CC373CAEFR2
Description
Modulator / Demodulator CMOS MOD R3.0 373CA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC44CC373CAEFR2

Package / Case
SOIC-16
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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UHF OSCILLATOR-VHF RANGE
nally divided by: 2, 4, 8, or 16. This is accomplished via the
special test mode bits, X2:X0.
SOUND SECTION
quire any external components. An internal low-pass filter
and matched structure provide very low harmonics levels.
incorporating the sound subcarrier oscillator. An AM modula-
tor is also included in the MC44CC373/374xxxx devices and
is enabled by the SYSL control bit for use in system L appli-
cations. The audio input signal is AC-coupled into the ampli-
fier, which then drives the modulators.
SRF, resulting in a reference frequency of 31.25 kHz or
62.5 kHz. The sound subcarrier frequency is selected by con-
trol bits SFD1:SFD0. The subcarrier frequencies are 4.5, 5.5,
6.0 or 6.5 MHz. The power-up default value is 5.5 MHz.
set the pre-emphasis time constant for the application. Infor-
mation on the selection of this filter may be found later in this
document under applications information.
LOGIC OUTPUT PORT (LOP)
plications for the LOP are to control an external attenuator or
an external switch, between the antenna input and TV output.
A typical attenuator application with PIN diode is shown in
Figure
ing on the signal strength of the Antenna Input. This reduces
the risks of intermodulation in certain areas. The LOP can
also be used as an OFF position bypass switch or for other
logic functions in the application.
Figure 3. Typical Attenuator Application with Pin Diode
Digital Home
Freescale Semiconductor
For VHF range operation, the UHF oscillator can be inter-
The sound oscillator is fully integrated and does not re-
The sound modulator system consists of an FM modulator
The sound reference divider is programmed by control bit
A capacitor is connected to the external pin, PREEM, to
The LOP pin controls any logic function. The primary ap-
The MC44CC373/374 modulators are intended for
UHF operation. Using the digital dividers for VHF
operation will cause additional spurious content in the
RF
are not provided. The user must provide external
filtering on RF
requirements.
Antenna
OUT
3. The LOP pin switches the PIN attenuator depend-
Input
. Performance specifications for VHF operation
OUT
LOP pin
to meet their VHF spurious
Vcc
NOTE:
TV Out
VIDEO SECTION - PEAK WHITE CLIP
tionality:
sync tip level is clamped.
(PWC) circuit. The PWC circuit function soft-clips the top of
the video waveform, if the sync tip amplitude to peak white
clip goes too high. This avoids carrier over-modulation by the
video.
trol Register 2, bits PW1:PW0. Clipping can be disabled by
software via bit PWC in the Control register.
TEST PATTERN GENERATOR
may be enabled under I
er to easily tune to the modulator output. The pattern consists
of two white vertical bars on a black background and a 1 kHz
audio test signal.
the Digital section. One controls the sync pulse circuitry, and
the other controls the luminance circuitry. These signals are
logic levels that drive the video circuitry which creates a com-
posite signal with the proper levels for sync pulses and lumi-
nance as shown in
0
TE1
The modulators require the following for proper video func-
This signal is AC-coupled to the video input where the
The video signal is then passed to a Peak White Clip
The Peak White Clip level may be set via the Option Con-
The modulators have a simple test pattern generator, that
The video test pattern consists of two signals generated by
TE2
A composite video input with negative going sync
pulses
A nominal video level of < 1.14 V
4.75μs
10
Figure 4. Test Pattern Generator
20
Figure
24 28
2
C bus control, to permit a TV receiv-
4.
30
TIME IN µS.
40
44
7/10
50
MC44CC373
3/10
60
64
5

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