ATA557001-TAQY Atmel, ATA557001-TAQY Datasheet - Page 15

RF Wireless Misc 125 kHz 1bit sensor (330bit r/w)

ATA557001-TAQY

Manufacturer Part Number
ATA557001-TAQY
Description
RF Wireless Misc 125 kHz 1bit sensor (330bit r/w)
Manufacturer
Atmel
Datasheet

Specifications of ATA557001-TAQY

Package / Case
SOIC
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.11
6. Error Handling
6.1
6.2
4863A–RFID–07/05
Programming
Errors During Writing
Errors Before/During Programming
When all necessary information has been received by the ATA5570, programming may proceed.
There is a clock delay between the end of the writing sequence and the start of programming.
Typical programming time is 5.6 ms. This cycle includes a data verification read to grant secure
and correct programming. After programming is successfully executed, the ATA5570 enters
block-read mode transmitting the block just programmed
Note:
Several error conditions can be detected to ensure that only valid bits are programmed into the
EEPROM. There are two error types, which lead to two different actions.
The following detectable errors could occur during writing data to the ATA5570:
Valid bit counts accepted by the ATA5570 are:
Password write
Standard write
AOR wake up
Direct access with PWD
Direct access
Reset command
Page 0/1 regular-read
If any of these erroneous conditions are detected, the ATA5570 enters regular-read mode, start-
ing with block 1 of the page defined in the command sequence.
If the command sequence was received successfully, the following error could still prevent
programming:
In case of a locked block, programming mode will not be entered. The ATA5570 reverts to block-
read mode, continuously transmitting the currently addressed block.
• Wrong number of field clocks between two gaps (i.e., not a valid “1” or “0” pulse stream)
• Password mode is activated and the password does not match the contents of block 7
• The number of bits received in the command sequence is incorrect
• The lock bit of the addressed block is already set
This timing and behavior is different from the e555x-family predecessors.
70 bits
38 bits
34 bits
38 bits
6 bits
2 bits
2 bits
(PWD = 1)
(PWD = 0)
(PWD = 1)
(PWD = 1)
(PWD = 0)
ATA5570 [Preliminary]
(Figure 5-8 on page
13).
15

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