MAX2116UTL+T Maxim Integrated Products, MAX2116UTL+T Datasheet - Page 11

• Manufacturer Part Number: MAX2116UTL+T
• Description: RF Receiver Direct Conv Tuner w/Monolithic VCO
• Manufacturer: Maxim Integrated Products

Specifications of MAX2116UTL+T

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

boosts the baseband output gain by 4.5dB, thus allow-
ing the output voltage swing of 1V
levels are typically 2V
The baseband highpass response is set through a capac-
itor connected between IDC+ and IDC- for the I channel
and QDC+ and QDC- for the Q channel. The 3dB high-
pass bandwidth is determined by the following equation:
To reduce the potential for baseband spurious pickup,
keep the connection between the DC compensation
capacitors and the IDC± and QDC± pins as short as
possible by placing the capacitors as close to the
device as manufacturing allows.
The MAX2116/MAX2118 include two 2.85V voltage reg-
ulator outputs, with a maximum source current rating of
3mA each. These outputs ease the interface to low-volt-
age demodulators by providing a clean pullup termina-
tion for open-drain/collector outputs. VREG1 is located
by the GC1 input control, with VREG2 conveniently
located between the 2-wire interface control pins.
The MAX2116/MAX2118 include eight fully monolithic
VCOs to cover the entire 850MHz to 2175MHz range.
Maxim has a detailed application note that describes
the operation of the VCO system and proper selection
of the desired VCO. This application note is available by
request from Maxim.
The on-chip crystal oscillator circuit has been designed
for operation from 4MHz to 27MHz. The crystal output
buffer amplifier is designed to nominally deliver
between 0.75V
necessary to add a resistor between the XTALOUT pin
and ground to increase the signal swing when using
Table 1. MAX2116/MAX2118 Write Address Byte
F3dB (highpass in Hz) = 1 / (11.75kΩ
High
High
High
High
AS2
Low
Low
Low
Low
DC Offset Compensation IDC± and QDC±
Complete DBS Direct-Conversion Tuner ICs
High
High
High
High
AS1
Low
Low
Low
Low
Crystal Output Buffer (XTALOUT)
P-P
______________________________________________________________________________________
and 1.5V
P-P
High
High
High
High
AS0
Low
Low
Low
Low
differential.
P-P
MSB
VREG1 and VREG2
. However, it might be
1
1
1
1
1
1
1
1
P-P
VCO Selection
. Output clipping
✕
C), C in farads
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
higher frequency crystals (>20MHz). Recommended
values are between 2kΩ and 5kΩ.
The MAX2116/MAX2118 conform to the Philips I
dard, 400kbps (fast mode), and operate as a slave.
The MAX2116/MAX2118 have eight read and write
addresses, which are determined by the logic state of the
three address-select pins (AS2, AS1, and AS0). In all
cases, the MSB is transmitted and read first (see Tables
1, 2, 3).
Bit DIV2 controls the VCO frequency divider. High level
= divide-by-2 enabled; low level = divide-by-4 enabled.
Default is DIV2 = 0 (divide-by-4 enabled).
Bits N(14)–N(8) are the 7 upper bits of the 15-bit pro-
grammable N divider, with the default value of N = 950.
The overall VCO divide ratio is:
2
N(3) … + 2
Bits N(7)–N(0) are the 8 lower bits of the 15-bit pro-
grammable N divider.
14
with Monolithic VCOs
✕
ADDRESS BYTE
N(14) + 2
0
0
0
0
0
0
0
0
0
✕
N(0)
13
✕
0
0
0
0
1
1
1
1
N(13) … +2
Programming Bit Definition
Serial Interface and
Control Registers
0
0
1
1
0
0
1
1
5
✕
Programming Bits
Byte 01 (Default = B6)
Byte 00 (Default = 03)
N(5) + 2
0
1
0
1
0
1
0
1
4
✕
N(4) + 2
2
C stan-
LSB
0
0
0
0
0
0
0
0
11
3
✕