92HD81B1C5NLGXUAX Integrated Device Technology (Idt), 92HD81B1C5NLGXUAX Datasheet - Page 16

• Manufacturer Part Number: 92HD81B1C5NLGXUAX
• Description: Audio Codec 2ADC / 2DAC 24-Bit 48-Pin VFQFPN EP Tray
• Manufacturer: Integrated Device Technology (Idt)
• Type: General Purposer

Specifications of 92HD81B1C5NLGXUAX

• Package: 48VFQFPN EP
• Adc/dac Resolution: 24 Bit
• Number Of Channels: 2ADC /2 DAC
• Sampling Rate: 192 KSPS
• Number Of Dac Outputs: 8
• Number Of Dacs: 2
• Operating Supply Voltage: 1.5|1.8|3.3|4|4.75|5 V

92HD81
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
IDT™ CONFIDENTIAL
D0-D3
AFG Power
State
2.1.4.
Asserted (Low)
When the HD Audio bus is in a low power state (reset asserted and clock stopped) the CODEC will
generate a Power State Change Request when a change in port connectivity is sensed and then
generate an unsolicited response after the HD Audio link has been brought out of a low power state
and the device has been enumerated. Per ECR015-B, this will take less than 10mS.
The following table summarizes the proper resistor tolerances for different analog supply voltages.
See reference design for more information on Jack Detect implementation.
SPDIF Output
Both SPDIF Outputs can operate at 44.1kHz, 48kHz, 88.2kHz, 96kHz and 192KHz as defined in the
Intel High Definition Audio Specification with resolutions up to 24 bits. This insures compatibility with
all consumer audio gear and allows for convenient integration into home theater systems and media
center PCs.
Per the HDA015-B ECR, the SPDIF outputs support the ability to provide clocking information even
when no stream is selected for the converter, or when in a low power state. Also, as stated in the
ECR, the SPDIF output ports support port presence detect.
SPDIF Outputs are outlined in tables below.
RESET#
Voltage (+/- 5%)
AVdd Nominal
Resistor
4.75V
39.2K
20.0K
10.0K
5.11K
2.49K
-
Output
Enable
Table 3. SPDIF OUT 0 Behavior
-
Converter
Enable
Resistor Tolerance
Dig
Pull-up to AVDD
PORT A (HP0)
PORT B (HP1)
SPDIFOUT0
SENSE_A
PORT C
Pull-Up
1%
-
Stream
16
ID
-
Resistor Tolerance
Keep Alive
Pull-up to AVDD
Enable
SPDIFOUT1
SENSE_A/B
SENSE_B
(DMIC1)
PORT E
PORT F
DMIC0
1%
Hi-Z (internal pull-down
enabled) immediately after
power on, otherwise the
previous state is retained.
Pin Behavior
V 0.987 11/09
92HD81