EVAL-ADUC834QS Analog Devices Inc, EVAL-ADUC834QS Datasheet - Page 73

• Manufacturer Part Number: EVAL-ADUC834QS
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADUC834QS

• Lead Free Status / RoHS Status: Not Compliant

Parameter
EXTERNAL DATA MEMORY WRITE CYCLE
REV. A
t
t
t
t
t
t
t
t
t
WLWH
AVLL
LLAX
LLWL
AVWL
QVWX
QVWH
WHQX
WHLH
WR Pulsewidth
Address Valid after ALE Low
Address Hold after ALE Low
ALE Low to WR Low
Address Valid to WR Low
Data Valid to WR Transition
Data Setup before WR
Data and Address Hold after WR
WR High to ALE High
CORE_CLK
PORT 0 (O)
PORT 2 (O)
PSEN (O)
ALE (O)
WR (O)
t
AVLL
Figure 73. External Data Memory Write Cycle
A16–A23
A0–A7
t
LLAX
t
AVWL
t
LLWL
12.58 MHz Core_Clk
Min
377
39
44
188
188
29
406
29
39
–73–
t
QVWX
Max
288
119
DATA
t
QVWH
A8–A15
t
WLWH
6t
t
t
3t
4t
t
7t
t
t
CORE
CORE
CORE
CORE
CORE
Min
CORE
CORE
CORE
CORE
Variable Core_Clk
– 40
– 35
– 50
– 50
– 40
– 100
– 50
– 130
– 150
t
t
WHLH
WHQX
Max
3t
t
CORE
CORE
+ 40
+ 50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADuC834
Figure
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